Search results

1 – 2 of 2
Article
Publication date: 28 February 2020

Akhendra Kumar Padavala, Narayana Kiran Akondi and Bheema Rao Nistala

This paper aims to present an efficient method to improve quality factor of printed fractal inductors based on electromagnetic band-gap (EBG) surface.

Abstract

Purpose

This paper aims to present an efficient method to improve quality factor of printed fractal inductors based on electromagnetic band-gap (EBG) surface.

Design/methodology/approach

Hilbert fractal inductor is designed and simulated using high-frequency structural simulator. To improve the quality factor, an EBG surface underneath the inductor is incorporated without any degradation in inductance value.

Findings

The proposed inductor and Q factor are measured based on well-known three-dimensional simulator, and the results are compared experimentally.

Practical implications

The proposed method was able to significantly decrease the noise with increase in the speed of radio frequency and sensor-integrated circuit design.

Originality/value

Fractal inductor is designed and simulated with and without EBG surfaces. The measurement of printed circuit board prototypes demonstrates that the inclusion of split-ring array as EBG surface increases the quality factor by 90 per cent over standard fractal inductor of the same dimensions with a small degradation in inductance value and is capable of operating up to 2.4 GHz frequency range.

Article
Publication date: 9 October 2019

Sunil Kumar Tumma and Bheema Rao Nistala

The purpose of this paper is to design an on-chip inductor with high inductance, high-quality factor and high self-resonance frequency for the equivalent on-chip area using…

Abstract

Purpose

The purpose of this paper is to design an on-chip inductor with high inductance, high-quality factor and high self-resonance frequency for the equivalent on-chip area using fractal curves.

Design/methodology/approach

A novel hybrid series stacked differential fractal inductor using Hilbert and Sierpinski fractal curves is proposed with two different layers connected in series using vias. The inductor is implemented in Sonnet EM simulator using 180 nm CMOS standard process technology.

Findings

The proposed inductor reduces the parasitic capacitance and negative mutual inductance between the adjacent layers with significant improvement in overall inductance, quality factor and self-resonance frequency when compared with conventional series stacked fractal inductors.

Research limitations/implications

The fractal inductor is used to create high inductance in the single-layer process, but access to multilayers is restricted owing to unusual and expensive fabrication processes.

Practical implications

The proposed inductor can be used in implementation of low noise amplifier, voltage controlled oscillators and power amplifiers.

Originality/value

This paper introduces a combination of two fractal curves to implement a hybrid fractal inductor that enhances the performance of the inductor.

Details

Circuit World, vol. 46 no. 2
Type: Research Article
ISSN: 0305-6120

Keywords

1 – 2 of 2