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Low relative humidity (RH) effect surface mount devices in numerous ways. The smaller size (0201) capacitor and resistor start wasting when RH is low. Due to low RH, electrostatic charges built-up on the surface of surface mount devices (SMDs) and component’s reel. The positive charged SMDs stick with the negatively charged reel tape and are wasted. This paper comprehensively explores the environmental effects on 0201 size surface mount devices during mounting process. Different type and size of surface mount devices are tested in low and desired RH to validate the effectiveness of the proposed approach. This paper will also highlight high electrostatic discharge (ESD) due to low RH which can be detrimental for small size surface mount devices. The experimental and graphical illustrations will stipulate the results of success rate for mounting components. The effect on ESD, subsequently varying temperature and humidity will also be analyzed.

In this paper, 0201 SDMs will be considered for analysis. The surface mount technology (SMT) plant temperature and humidity has been varied to examine the properties of small size SMDs. Total 5 hours production data are collected from Laptop motherboard production environment. This approach is applicable to all SMT environment.

The authors reduced the wastage of 0201 chip size resistor and capacitor. Total 11 components are selected of this size, and there success rate is observed during mounting. These components are first observed in harsh environment where the temperature is first set to 20ºC and RH is set to 25 per cent. The success rate of these components is very low due to component’s wastage. When the plant temperature is set to 25ºC and RH is set to 45 per cent, the success rate of mounting increased up to 100 per cent. A single component placement success rate with respect to RH is observed for one month. The results are shown in Table IV. It can be seen that the success rate is near 100 per cent when RH and temperature is maintained in production environment. To eliminate the ESD build-up in material and equipment in manufacturing environment humidification is a very effective way. When the RH is kept to 45 per cent, the moisture content of the air is a natural conductor and earths any ESD in environment.

Experimental data have been obtained from Laptop motherboard manufacturing process to validate the effectiveness of proposed approach.

A general introduction is given to surface mounted devices, processes and machinery, followed by Mullard Electronic Assemblies Division's experience and a description of practical assemblies using surface mounted devices. Thoughts of future possibilities and requirements of substrate systems for the advancement of surface mounted assemblies are also presented.

Thermal characterisation of surface mount devices (SMDs) has become a growing concern as these components have increased in use—a situation aggravated by the lack of accepted industry standards for making thermal measurements. This paper attempts to provide better understanding of thermal resistance terminology, and to summarise some of the existing problems with current standards and common practices. A defined methodology for obtaining SMD thermal characteristics is proposed, involving measurement by vendors and confirmation by users, and suitable for use in meeting application‐oriented requirements. The importance of providing a clear and complete set of test condition information is also emphasised.

In the last decade through‐hole mounting to printed wiring boards has matured and people now have the tools to diagnose and correct any solderability problems which might arise. Such is not the case with surface mount soldering technology. In surface mount the connections are smaller and are often hidden from view. Therefore when a solderability problem does occur it may never be known until the assembly fails. The solution to the situation is to understand the nature of the problems and provide assurance that they will not occur during assembly soldering. This paper is structured in two parts. The first details the types of solderability problems unique to surface mounting. Examples of these problems will be shown and discussed with reference to solder joint life. The second part of the paper discusses the solderability testing of surface mount devices and printed wiring boards intended for surface mounting. This discussion will concentrate on the new quantitative solderability test methods being developed in this company's laboratory for leadless devices and printed wiring boards. As part of this development, new solderability criteria have been defined which reflect the unique problems associated with surface mounting.

The screen printing and reflowing of solder paste is compared with wave soldering for the attachment of surface mounted devices to PCBs. Both techniques have advantages and disadvantages which are fully discussed. The method chosen for a particular application will depend upon the production facilities available, the principal package types involved in the design, and the anticipated cost. The main advantages of the screen printing process have been found to be a relatively low soldering temperature, freedom from device orientation and package design constraints, and few proximity effects, while those for the wave soldering process have been found to be compatibility with present mass soldering operations, the ability to combine both through‐hole devices and SMDs on the same board, a single soldering operation, and a solder joint volume defined by the joint design. It is concluded that in the long term screen printing and reflow is likely to become the dominant technology, but in the intermediate term wave soldering is likely to remain attractive while manufacturers move from the established through‐hole technology to the more space‐efficient surface mounted technology.

The International Electronic Components Show in Paris in November, 1983, provided the occasion for a very successful meeting of ISHM‐France which attracted 170 attendees. The following presentations were given:

A packaging system has been developed using surface mounted components on ceramic substrates for conductive‐cooling applications. This has resulted in a high density, high reliability, and highly producible product. A 20 square‐inch module can mount up to 150 leadless chip carriers and can dissipate up to 30 W with a maximum junction temperature (Tj) of 90°C. Design guidelines, processing, and assembly techniques geared to surface mount devices for this high density ceramic thick‐film multilayer interconnect board will be presented. Constraints regarding the thermal characteristics and physical dimensions of the devices and the limitations of CAD routers, processing equipment, and automatic assembly equipment will also be discussed. Design guidelines regarding the electrical characteristics, such as capacitance and resistance in terms of layout and processing, will be defined. Timing criticality and busing layout guidelines will be discussed. Processing design considerations such as power and ground planes, conductor layers, layout boundaries, and surface mount footprints will be outlined. Other considerations taken during the placement, routing, and artwork phases will be presented, as well as those items to be considered during the processing flow. The assembly process will be discussed emphasising problems that can be encountered with tinning, placement, reflow, and cleaning. Rework of defective surface mount components will be reviewed in addition to considerations for design modifications.

Implementing surface mount technology (SMT) into military systems has not progressed as rapidly as expected. One of the major reasons is the lack of availability of MIL Spec. surface mountable components. Therefore, if one is to realise the benefits of SMT, manufacturing processes must be developed that allow inserted components to be mounted on the same printed wiring board (PWB) with surface mount components (SMCs). Honeywell's Ordnance Division has developed manufacturing processes which allow SMCs to be mounted on both sides of the PWB and inserted components to be mounted on one side of the same PWB. The surface mount solder reflow and wave soldering are performed in a single‐step solder system. This simplifies and reduces the number of manufacturing process steps for this type of surface mount assembly (SMA). This paper describes three major types of SMAs and their complexity levels. Definitions of the SMA types and complexity levels are necessary for selecting production equipment and developing SMA processes. Assembly process limitations are directly related to the SMA type and complexity level. Layout guidelines and processes from solder deposition to cleaning are discussed. Full scale engineering development (FSED) hardware has been fabricated using the single‐step solder process for SMAs with both SMCs and inserted components on the same PWB. The single‐step solder process offers an excellent solution to fabricating electronic assemblies where SMCs and inserted components are mounted on the same PWB. Plans to expand and enhance the first generation SMA fabrication processes to accommodate higher complexity levels are discussed.

Infra‐red ovens and furnaces have been in use in the microelectronics industry for a long time, but recent design advancements and process developments have provided the precise furnace control dictated by surface mount technology. This paper addresses the process implemented by state‐of‐the‐art infra‐red equipment and the impact which that technology has on the surface mount industry. The temperature cycles that current infra‐red equipment utilises to reflow surface mount devices differ from the competing technologies in several distinct areas. Infra‐red equipment provides controlled preheat rates in the critical initial heating stages, followed by temperature equilibration and final reflow. The radiative and other processes involved in the preheat of product are discussed, with particular attention paid to the removal of volatile organics from the solder paste and the stress induced on all elements of the assembly. The control of temperature uniformity is discussed, and the effects of geometry, thermal complexity, and absorptivity are examined with reference to heat transfer theory. The ability of infra‐red equipment to provide close control of the ambient atmosphere during reflow cycles is outlined. Control of the atmosphere can benefit process control, reliability, and cosmetics. Inert atmospheres, such as pure nitrogen, can provide faster processing, more rapid and easier cleaning of fluxes, better solderability of secondary joints, and better cosmetics for the assembly. The inclusion of small amounts of hydrogen in the ambient can induce changes in the contact angle of the flux to polymers and ceramics, providing benefits for other process considerations, such as component shifting, solder balling and flux removal.

Non‐corrosive rosin fluxes have historically been used for telephone communications assemblies because they provide a measure of reliability even if the flux is not totally removed from the assembly. While cleaning is not always necessary from a reliability standpoint, testing issues, product appearance, operating performance and customer requirements must also be considered when making the decision whether or not to clean. As the electronics industry packages more and more functionality on less and less real estate, soldering yields need to increase in order for the assembly process to remain profitable. This requires not only attention to the product's design for manufacturing but it may also require aggressive fluxes to be used in the assembly process. When aggressive fluxes are employed, the necessity for cleaning is greatly increased. The particular combination of flux and cleaning option depends on product design, process capabilities, end point requirements, and environmental considerations. Pending restrictions on the production and use of chlorofluorocarbons (CFCs), and the potential for tighter controls on chlorinated solvents and aqueous detergent effluents, are certain to add to the cost of standard processes. For these reasons alternative cleaning processes have been explored. The evaluation and subsequent use of water soluble flux with ‘water only’ cleaning, terpene cleaning of rosin flux residues, low solids flux ‘no‐clean’ wave soldering and ‘no‐clean’ assembly using reflowed rosin based solder pastes within AT&T are reviewed. A user's assessment of aqueous and semi‐aqueous cleaning is presented which indicates that there are acceptable alternatives to CFCs.