IMAPS UK

Microelectronics International

ISSN: 1356-5362

Article publication date: 1 April 2000

41

Keywords

Citation

(2000), "IMAPS UK", Microelectronics International, Vol. 17 No. 1. https://doi.org/10.1108/mi.2000.21817aab.001

Publisher

:

Emerald Group Publishing Limited

Copyright © 2000, MCB UP Limited


IMAPS UK

IMAPS UK

Keywords: MAPS, United Kingdom

IMAPS-UK have announced details of a two-day European Conference to be held at the Novotel Hotel, London on 24-25 January 2000. The event is co-sponsored by the IEEE Components, Packaging and Manufacturing Technologies UK and RI Chapter and the IEE.

Under the heading "Microtechnologies for the New Millennium", the conferences will be preceded by a tutorial on "Building MCMs with CSPs and Organic HDI Boards". The two-day conference programme will offer delegates from the electronic industry an opportunity to hear a total of 23 papers presented by experts from leading international companies, research centres and universities.

Day one addresses multichip modules. Entitled EC-MCM-2000, it will be IMAPS' 6th European Conference on the subject.

Day two will focus on microsystems packaging. It will be truly international, with 23 papers being presented over the two days. Expert speakers will represent leading companies, research centres and universities from the UK, Ireland, France, Germany, The Netherlands, Italy, Switzerland, Slovenia and the USA.

As we approach the new Millennium we feel that now is the time to present and discuss the future of the microtechnology industry and its role in the future of electronics.

6th European Conference on MultiChip Modules - EC-MCM-2000

Conference programmeMonday 24 January 2000

The first conference day covers technology, improving yield and reliability, design and applications. Chaired by Professor Nihal Sinnadurai, papers presented will include the following:

Technology

  1. 1.

    Leading edge MCMs: TechLead Corporation, Denver, USA.

  2. 2.

    Thick-film resistors and multilayer diffusion patterning technology Josef Stefan Institute, Slovenia.

  3. 3.

    A trade-off between integrated passives and SMD components ETH, Zurich, Switzerland.

  4. 4.

    Nitrogen/hydrogen plasma cleaning of MCM-L - a new study to improve bondability in hybrid applications IBM Italia, Italy.

Improving yield and reliability

  1. 1.

    Using FPGAs to enhance the testing of MCMs Georgia Tech, USA.

  2. 2.

    Reliability formulation for MCMs in the presence of stochastically defined environments Asymtek, California, USA.

  3. 3.

    Pre-wire bond and BGA plasma cleaning for maximising yield Advanced Surface Technology Inc., USA.

Design and applications

  1. 1.

    KitGen - an MCM design kit generator Fraunhofer IZM, Germany

  2. 2.

    Practical design of MCM interconnections at RF Middlesex University, England.

  3. 3.

    Study of materials for novel millimetre-wave MCMs University of Surrey, England.

  4. 4.

    Advanced IC packaging and intellectual property re-use Avanti Corporation (Xynetix), England.

"Microsystems Packaging 2000"

Tuesday 25 January 2000

The second Conference day will focus on materials, processes and modelling; challenging applications; design prototyping and manufacturing. Chaired by Dr Malcolm Wilkinson of TFI, papers presented will include:

Materials, processes and modelling

  1. 1.

    Materials issues for microsystem packaging NMRC, Ireland.

  2. 2.

    3D wafer level packaging Tru-Si Technologies, California, USA

  3. 3.

    Thermomechanical modelling of MST components and packages NMRC, Ireland.

Challenging applications

  1. 1.

    Medical applications for MST TFI, England.

  2. 2.

    Packaging of closed chamber PCR-chips for DNA amplification University Southampton, DERA Porton Down, England.

  3. 3.

    Application specific packaging MCE Newmarket Ltd, England.

  4. 4.

    Optoelectronic applications Thomson-CSF, France.

Design prototyping and manufacturing

  1. 1.

    Europractice: a European project for MST design, prototyping and manufacture Europractice Coordination Office, England.

  2. 2.

    Chip size package technology for MEMS and IC components Tronics Microsystems, France.

  3. 3.

    Packaging design driven by application requirements AML, England.

  4. 4.

    Infrastructure for MST production Twente MicroProducts, Enschede, The Netherlands.

  5. 5.

    Centre for packaging and interconnect technology, Dortmund AVT Centre, Dortmund, Germany.

Throughout both days there will be a trade exhibition supporting the conference that will include organisations representing important sectors of the multichip modules, microelectronics and packaging industry.

"CSP + HDI = MCM-L!" (Building MCMS with CSPs and Organic HDI Boards)

Tutorial: 23 January 2000

Instructor

Charles E. Bauer, PhD, TechLead Corporation

Course description

MCM technology languished throughout most of the 1990s due to high costs resulting from low yields and issues with known good die. During the last five years of the decade new developments in chip scale packages and high density, build up multi-layer printed wiring boards have created new opportunities to design and produce ultra miniaturized modules using conventional surface mount manufacturing capabilities. Focus on the miniaturization of substrate based packages such as ball grid arrays resulted in chip scale packages (CSPs) offering many of the benefits of flip chip along with the handling, testing, manufacturing and reliability capabilities of packaged devices. New developments in the PWB industry sought to reduce the size, weight, thickness and cost of high density interconnect (HDI) substrates. Shrinking geometries of vias and new constructions significantly increased the interconnect density available for MCM-L applications. This tutorial describes the most promising CSP and HDI technologies for portable products, high performance computing and dense multi-chip modules. Coverage includes design rules, materials, processes, constructions and applications. Examples of design rule selection and application case studies demonstrate the application and benefits of these new technologies.

Course outline

Introduction

  • miniaturization drivers;

  • key technology developments;

  • interdependence of packaging, interconnection and assembly;

  • industry shifts.

Semiconductor packaging

  • chip scale package categories;

  • CSP materials, processes and structures;

  • design implications.

High density substrates

  • build up technology categories;

  • HDI materials, processes and structures;

  • design rules and their selection.

Cost management

  • predictive engineering;

  • design report cards;

  • package, substrate, manufacture and test interactions.

Summary and conclusion

  • case studies;

  • paradigm shifts;

  • convergence versus integration.

Instructor biography

Charles E. Bauer, PhD is managing director of TechLead Corporation, a technology management company specializing in the electronics packaging, interconnection and assembly industry. Dr Bauer lectures in Europe, the Middle East, Japan, Asia, Australia/New Zealand and the South Pacific as well as throughout the USA on these topics. His experience stems from his work in the substrate based packaging arena in 1986 while serving as Semiconductor Packaging Operations Manager at Tektronix Inc., USA and first published on the subject in 1988. Since that time Dr Bauer has consulted on BGA, CSP, MCM and Flip Chip technologies and applications for major companies such as Matsushita, General Electric, Samsung, Philips, Cookson Electronics and Ericsson.

Venue

The Novotel, Hammersmith, West London, 1 Shortlands, London W6 8DR. Tel: +44 (0) 181 237 7407; Fax +44 (0)181 748 2228.

By car: just off the Hammersmith flyover junction with the M4. A map will be supplied to all conference delegates and exhibitors. The hotel has an underground car park with reduced rates for residents.Nearest railway station: Hammersmith Underground.Nearest airport: London Heathrow.

Reduced conference fees for young engineers/trainees

IMAPS-UK also offers the student rate delegate fee to each young engineer/trainee (under age of 26) who is accompanied by a full fee paying delegate. (One reduced fee per full fee delegate.)

IMAPS-UK database

IMAPS-UK is presently compiling a database of information for its members so that anyone with Internet facilities can access a single source of information for most of their needs. The database is on the IMAPS-UK Web site at http://www.imaps.org.uk/imaps

There is a list for components, equipment, materials and services circuit manufactures, academic contacts, International IMAPS and a list of other Web sites of interest. If you would like to be included please contact Kelvin Williams: E-mail: k.williams@kingston.ac.uk.

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