A program for numerical simulation of two‐dimensional semiconductor devices coupled with an external circuit is described. The circuit equations are formulated using modified nodal analysis to allow an arbitrary configuration of elements like, e.g., also semiconductor compact models. Coupling to the numerical devices is attained via their admittance matrix leading to a two‐level Newton method. To calculate this matrix two methods are compared: (a) a linearization scheme and (b) a secant method. The comparison shows a significant speed advantage of the secant method despite its lower rate of convergence. The linearization scheme, however, is the more stable and robust method and should be used in critical cases where convergence problems can occur. An efficient bypassing scheme was developed for the linearization scheme leading to a computation speed comparable to that of the secant method, but maintaining the better convergence properties. A further advantage of the two‐level Newton method used in this work is that the CPU‐time consuming solution for the numerical devices can be done in parallel on different processors. Several examples are given to demonstrate the capabilities of the developed simulator.
Schröter, M. (1991), "TRANSIENT AND SMALL‐SIGNAL HIGH‐FREQUENCY SIMULATION OF NUMERICAL DEVICE MODELS EMBEDDED IN AN EXTERNAL CIRCUIT", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 10 No. 4, pp. 377-387. https://doi.org/10.1108/eb051714
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