Electrical CAD Analysis for Multilayer Package Design
Article publication date: 1 March 1987
One of the most challenging problems facing the package designer today is how to predict electrical performance before committing a design to fabrication. One means of accomplishing this task is to employ computer‐aided design (CAD) tools that analyse performance from simulations done on models derived from the physical package structures. These models, when combined with the chip models, allow interactive simulation and timing analysis of an entire multilayer package. This paper describes a CAD approach for evaluating interconnect performance within multilayer package structures and presents several examples to show how the approach is applied.
Belcourt, F.J. and Lane, T.A. (1987), "Electrical CAD Analysis for Multilayer Package Design", Microelectronics International, Vol. 4 No. 3, pp. 38-41. https://doi.org/10.1108/eb044291
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