Induced voltage analysis of superconducting fault current limiter

Abstract

Purpose

Saturated core type superconducting fault current limiter (SFCL) can effectively limit the short-circuit current in power system. However, the high induced voltage will occur between the terminals of DC superconducting bias winding caused by the variation of magnetic flux linked by DC winding due to the increasing short-circuit current. The DC source may be damaged. Thus, the induced voltage should be considered in DC winding design. The paper aims to discuss these issues.

Design/methodology/approach

Three-dimensional finite element method coupled with electric circuit.

Findings

The short-circuit current flowing through AC windings and induced voltage of DC winding are analyzed by using three-dimensional finite element method coupled with electric circuit for a 220-kV three-phase SFCL. Several circuit elements, such as a capacitor connected with DC winding in parallel, an additional short-circuit winding wound around DC core column and an energy-released piezoresistor, are, respectively, used for induced voltage reduction. These methods aim to save magnetic coupled energy in DC winding, or oppose the variation of magnetic flux, or limit the voltage of DC winding by using a resistor with low resistance.

Originality/value

The different methods for reduction of induced voltage of superconducting DC winding are studied and discussed. The decreased induced voltage may benefit the safety of superconducting DC winding and the source.

Citation

Wang, Z., Wang, S., Qiu, J., Gong, W. and Zhang, J. (2014), "Induced voltage analysis of superconducting fault current limiter", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 33 No. 1/2, pp. 38-46. https://doi.org/10.1108/COMPEL-11-2012-0342