Modeling and analysis of the growth of copper dendrites in saturated conditions using a multilevel factorial design analysis

Abstract

Purpose

Tracks, pads and vias on printed circuit boards can suffer from a variety of problems, if the surfaces are contaminated with electrically‐conducting substances. Aims to model a multilevel full‐factorial design to study the effects of temperature, voltage and electrode gap on dendritic growth under saturated conditions, i.e. water droplet contamination.

Design/methodology/approach

Preparation of several DC‐biased combed‐copper interdigitated capacitors placed in temperature‐controlled water‐filled cuvettes enabled the specific monitoring of dendrite activity. The monitoring used the detection of sharp current increase that accompany a dendritic short circuit condition.

Findings

A high R² polynomial model was produced and it was noted that increased voltages reduce the reliability impact of dendritic growth.

Originality/value

The paper focuses on the reliability impact dendritic growth in saturated conditions.

Citation

Lawson, W., Pilkington, R.D. and Hill, A.E. (2007), "Modeling and analysis of the growth of copper dendrites in saturated conditions using a multilevel factorial design analysis", Microelectronics International, Vol. 24 No. 2, pp. 28-34. https://doi.org/10.1108/13565360710745575