A new method for measuring signal integrity in CMOS ICs

Sonia Delmas‐Bendhia (INSA – Department of Electrical and Computer Engineering, Toulouse, France)
Fabrice Caignet (INSA – Department of Electrical and Computer Engineering, Toulouse, France)
Etienne Sicard (INSA – Department of Electrical and Computer Engineering, Toulouse, France)

Microelectronics International

ISSN: 1356-5362

Publication date: 1 April 2000

Abstract

The aim of this paper is to present a new and original method for on‐chip measurements of very high frequency parasitic signals where a sampling circuit is directly included in the test chip. The paper describes the usefulness of this sensor for measuring signal propagation and cross‐talk glitch on integrated circuit interconnects and also gives the results obtained experimentally.

Keywords

Citation

Delmas‐Bendhia, S., Caignet, F. and Sicard, E. (2000), "A new method for measuring signal integrity in CMOS ICs", Microelectronics International, Vol. 17 No. 1, pp. 17-21. https://doi.org/10.1108/13565360010305886

Publisher

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MCB UP Ltd

Copyright © 2000, MCB UP Limited

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