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The paper aims to focus on the semiconductor temperature prediction in the multichip modules by using a simplified 1D model, easy to implement in the electronic simulation tools.

Accurate prediction of temperature variation of power semiconductor devices in power electronic circuits is important for obtaining optimum designs and estimating reliability levels. Temperature estimation of power electronic devices has generally been performed using transient thermal equivalent circuits. This paper has studied the thermal behaviour of the power modules. The study leads to correcting the junction temperature values estimated from the transient thermal impedance of each component operating alone. The corrections depend on multidimensional thermal phenomena in the structure.

The classic analysis of thermal phenomena in the multichip structures, independently of powers’ dissipated magnitude and boundary conditions, is not correct. An advanced 1D thermal model based on the finite element method is proposed. It takes into account the effect of the heat‐spreading angle of the different devices in the module.

The paper focuses on mathematical model of the thermal behaviour in the power module. The study leads to a correction of the junction temperature values estimated from the transient thermal impedance of each component given by manufacturers. The proposed model gives a good trade‐off between accuracy, efficiency and simulation cost.

This paper aims to focus on the trade-off between losses and converter cost.

The continual development of power electronic converters, for a wide range of applications such as renewable energy systems (interfacing photovoltaic panels via power converters), is characterized by the requirements for higher efficiency and lower production costs. To achieve such challenging objectives, a computer-aided design optimization based on genetic algorithms is developed in Matlab environment. The elitist non-dominated sorting genetic algorithm is used to perform search and optimization, whereas averaged models are used to estimate power losses in different semiconductors devices. The design problem requires minimizing the losses and cost of the boost converter under electrical constraints. The optimization variables are, as for them, the switching frequency, the boost inductor, the DC capacitor and the types of semiconductor devices (IGBT and MOSFET). It should be pointed out that boost topology is considered in this paper but the proposed methodology is easily applicable to other topologies.

The results show that such design methodology for DC-DC converters presents several advantages. In particular, it proposes to the designer a set of solutions – as an alternative of a single one – so that the authors can choose a posteriori the adequate solution for the application under consideration. This then allows the possibility of finding the best design among all the available choices. Furthermore, the design values for the selected solution were obtainable components.

The authors focus on the general aspect of the discrete optimization approach proposed here. It can also be used by power electronics designers with the help of additional constraints in accordance with their specific applications. Furthermore, the use of such non-ideal average models with the multi-objective optimization is the original contribution of the paper and it has not been suggested so far.