IMAPS-UK “Beyond Solder” Technical SeminarNational Physical Laboratory, Teddington30 June 2010

Circuit World

ISSN: 0305-6120

Article publication date: 23 November 2010

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Citation

(2010), "IMAPS-UK “Beyond Solder” Technical SeminarNational Physical Laboratory, Teddington30 June 2010", Circuit World, Vol. 36 No. 4. https://doi.org/10.1108/cw.2010.21736dac.003

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Emerald Group Publishing Limited

Copyright © 2010, Emerald Group Publishing Limited


IMAPS-UK “Beyond Solder” Technical SeminarNational Physical Laboratory, Teddington30 June 2010

Article Type: Exhibitions and conferences From: Circuit World, Volume 36, Issue 4

The UK Microelectronics Packaging Society (IMAPS-UK) held a one-day technical seminar and industry-networking event in conjunction with the Innovative Electronics Manufacturing Research Centre (IeMRC), The Welding Institute (TWI) and The National Physical Laboratory (NPL) at the NPL in Teddington on the 30 June 2010. This event, which was attended by a capacity audience, had the objective of providing an opportunity to learn more about the new interconnection processes and materials that were increasingly providing alternatives to conventional solder and which also enabled new applications not possible via soldering. The full title of the seminar was “Beyond Solder – Helping You Make Reliable Connections”.

 Figure 1 The IMAPS seminar organising team, L to R; Chris Hunt, Suzanne
Millar, Matt Brown, John Carr and Andy Longford

Figure 1 The IMAPS seminar organising team, L to R; Chris Hunt, Suzanne Millar, Matt Brown, John Carr and Andy Longford

Chris Hunt (Figure 1) of NPL and IMAPS welcomed the attendees to Bushey House and invited each of the exhibitors to make a few brief introductory remarks about their organisations. These included Inseto, Tecan, TWI, JP Kummer, and MacGregor Systems.

The seminar then began with an opening keynote presentation by Martin Goosey, Industrial Director of the IeMRC. Martin began by outlining the role of the IeMRC in supporting research in the UK academia that was directly aimed at meeting the future technology needs of the UK electronics industry. He then set the scene for the day by presenting some of the benefits, challenges and opportunities that were possible by using solder-free connections. He reminded the audience that both soldering and adhesive-joining technologies had been successfully employed in a wide range of applications for thousands of years. Once it was possible to move beyond solder, there were a wide range of applications that could be addressed by the use of alternative materials and examples cited included press fit connectors, conductive adhesives, eutectic bonding and the use of nanotechnology. One of the key reasons for moving away from soldering had been the move to lead-free and the need for higher soldering temperatures. Another reason was associated with the growth of printed and polymer electronics, where it was often not possible for the materials used to survive soldering temperatures. Although there were real benefits to be realised from the use of solder alternatives, there could also be challenges that needed to be addressed, such as reduced electrical and thermal conductivities and the potential for other key properties such modulus and adhesive strength to change with environmental exposure. Some examples of novel, non-solder-based interconnect technologies were then given and these included the “Occam process” developed by Verdant Technologies and the “Buckled pillar concept” proposed by ElectroIQ. Martin then briefly discussed the growing interest in the use of nanotechnology in various electronics assembly applications and he suggested that nanotechnology using novel carbon-based materials such as carbon nanotubes offered great potential for meeting the demands of many new applications. The presentation concluded with an affirmation that the world beyond solder was offering many new opportunities for those working in the electronics industry.

The next presentation was given by Mark Currie of Henkel Corporation who discussed “Alternatives for high thermal power packages” for the semiconductor industry. He began by reviewing high-power thermal packages and the market split into the different types that were used. High-power large discretes tended to use solder whereas low-power small discretes used adhesives in their assembly. The market was currently dominated by the use of high-lead solders that had a RoHS exemption until 2013. Solder was used because of its high thermal and electrical conductivities, low cost and because it was well suited for small die applications on lead frames. However, solder was not used in every solution. Mark then discussed the materials that were used to assemble thermal packages and highlighted where solder was used. He also showed the standard assembly process for these packages. It was pointed out that the solders used in package assembly had to survive the SMT assembly process and thus needed higher melting points. The magic number for SMT reflow was 250°C, since the solders used for package assembly had to have melting points above this temperature. There were only a few solders that were suitable and lead-free, e.g. Au/Sn, but cost often limited its use. There was thus a big question about which approaches would be used once the RoHS exemption was removed. Possible solutions included the use of conductive films for new high-power packages and the use of thermosetting materials in low-cost pastes. There would also be the use of silver pastes and it was anticipated that some lead exemptions might also be permitted for certain specific applications. Mark then went on to focus on the potential application of transient liquid phase sintering (TLPS), which had been around since 1959. For power packages, TLPS would need to avoid excessive brittle IMC formation and it must form a bond to typical materials such as copper, nickel, silver and even silicon. One TLPS process was then demonstrated schematically and DSC curves shown which illustrated the increased melting point of the newly formed compound. Work was also being undertaken to combine different technology platforms, e.g. by combining lead-free solutions with organic carriers – the example cited combined flux technology with underfill. The aim of this approach was to effectively lock in or encapsulate the solder during the subsequent reflow process. Mark concluded by stating that there was currently no viable non-lead solution. It was likely that the market would segment depending on cost and performance requirements.

The third presentation was given by Simon Broadhurst of Kuliche and Soffa (K&S), who talked about “advanced wire-bonded interconnects”. He began by giving an overview of copper wire bonding, which had first been used for discretes and power ICs. There had been renewed interest in converting to copper since 2006 when gold prices had increased significantly. Recently, many of the knowledge gaps had been closed and contract assemblers were switching from gold to copper. There were data to show that around 15 per cent of the total market was now using copper, with the biggest market growth being in Taiwan. The majority of mass production was using 50-μm wire, with smaller diameters currently at the qualification stage. It was expected that 45-μm wire would soon be in mass production. There was also a growing trend towards the use of nickel palladium gold (ENIPIG) and bare copper finishes for wire bonding. It was a given requirement that assemblers should be able to run exactly the same baseline process with copper as for gold. Multitier wire bonding with copper was also emerging as a possibility due to the ability to perform consistent looping and packages with up to 2,000 bonds were currently being produced. One of the key challenges with copper wire bonding had been ball formation, particularly as sizes were getting smaller. The use of an inert environment during copper ball formation was found to help improve ball formation and much modelling had been performed on gas flow rates during bonding, which had helped with optimisation of the chamber. Gas consumption needed to be kept to a minimum in order to reduce overall costs. Examples of balls formed with different gas flow rates were shown and it was clear that the flow had a significant impact on ball shape.

Copper wire was much harder than gold and thus there was the potential for bond pad damage. Work had been undertaken to reduce this effect and a multistep first bond process had been developed which included an initial scrub prior to the use of the ultrasonic phase. This helped to initiate intermetalllic formation in the X-direction, which in turn helped to reduce movement of the aluminium and improved the reliability. There were also problems that needed to be addressed on the second bond and the example of “copper roll” was described. The second bond could be improved by using a two-stage process to give a well-deformed stitch shape. This was known as a segmented second bond and it had a number of properties that could be varied in order to optimise the bond. The capillary tip had also been modified to produce a unique granular morphology that improved the grip between the wire and the capillary during bond formation. This helped to reduce the ultrasonic energy needed and minimised pad damage. K&S had also carried out studies to understand what was happening in the bond pads during the bonding process and a key conclusion was that a very deep copper layer was needed to avoid the possibility of pad flexing and subsequent reliability issues. This was why a nickel palladium gold finish was often added as an alternative to aluminium on the pads, as it helped to harden the surface. Work had also been carried out to assess the influence of moulding and moulding compound flow on the copper wires. Copper-aluminium intermetallic growth had been found to be much slower than for the gold-aluminium intermetallic. For the future, bond pads would increasingly be designed for copper wire bonding and new equipment would be designed for use with copper as a standard approach.

The final presentation of the morning was entitled “Press fit connections for automotive and high reliability applications” and it was given by Andy Longford of PandA Europe. Andy began by giving an overview of press fit basics and the function of press fit technology. It had been used for many years in telecoms applications and was also now being adopted by the automotive industry. The force needed to form the connection could vary from a few grams to many kilograms, depending on the specific connector type and application. The “eye of the needle” type press fit connector was a standard used in telecoms applications. The demands for automotive applications were much more stringent than for telecom. Retention forces could be from 20 to 40 N and they had to be stable at high temperatures and under vibration conditions. Use of a press fit module offered advantages for connecting capacitors to PCBs in automotive applications. The PCB requirements for press fit were also described and high Tg boards were increasingly being used. Testing criteria for press fit included insertion force, vibration in temperature, thermal shock, plated through hole integrity, high-temperature exposure and a number of other properties. For under hood and near engine applications testing to 175°C was a requirement. Testing of plated through hole integrity was performed to the IEC 60352-5 standard. Andy then went on to describe press fit module development that enabled stress-free assembly. Main automotive applications included tyre pressure monitors, junction boxes, position sensors, inverters and power modules and there was also now an increasing use in energy applications, including interconnects for solar power and their accompanying inverter modules. The presentation concluded with a summary of the basic advantages of press fit technology. Ease of disassembly was a useful feature for “green system” development. Press fit interconnects were an enabler for more reliable and robust connections for harsh environments. Motor and power control equipments were said to be the next key development area for press fit applications.

The first paper after lunch was given by Martin Wickham of NPL, who presented “End of life options for electronic interconnects”. He began by discussing the size of the UK PCB waste stream and the implications of the WEEE Directive, which he stated had been in place since July 2007. There was a need to develop new recycling processes for PCBs and some more artistic examples of uses for recycled PCBs were shown. Most PCBs, however, were shredded into smaller pieces which were then ultimately consigned to smelting for metal recovery. The typical thermoset resins used in circuit boards were not amenable to recycling and there were few thermoplastic PCB substrate materials currently being used, although polyetherimide (PEI) had been employed in the past for disc drives and car radios. The work carried out by NPL had focussed on moulded substrates (MIDs) and had been performed in conjunction with the company Moulded Circuits. In this case, the polymer used to produce circuit boards via an additive process was ULTEM (PEI). Assembly had been undertaken using tin-bismuth solder (mp 137°C) and a 150°C peak reflow temperature. The boards produced achieved no failures after 1,000 cycles of −55 to 125°C thermal cycling testing. However, the main approach taken had been to use isotropic conductive adhesives to assemble the components. Assembled boards had been subjected to various accelerated testing conditions and performance data were shown. A polyester film coupled with silver-loaded conductive inks had also been used to produce boards. Third, ink jet printing had been utilised in collaboration with the company Conductive Ink Technology (CIT) to produce an NPL developed “direct write test” design on Melinex (PET) with 1-μm thick copper tracks and pads and 0.3-mm lines and spaces. Examples of the assembled boards were shown. Performance and reliability data for the various approaches were compared; damp heat testing (85°C/85 per cent RH) was found to have the largest effect on the assemblies. This was thought to be due to oxidation of the materials used. NPL had a TSB-funded project underway with In2Tec and Gwent Electronic Materials to develop sustainable multilayer electronics assemblies that represented a disruptive change in the manufacturing processes used. Martin concluded by giving a brief overview of the other related projects with which NPL was currently also involved.

Norman Stockham from TWI then gave a presentation on “Joining and packaging technology for high temperature electronics”. He began by outlining the increasing need for electronics to operate at high temperatures; this could be as high as 800°C and he detailed the melting points of conventional solders which often melted below the operating temperatures required for some high-temperature electronics. The key advantages of solders were also then outlined and these included reworkability and their gap-filling capability. The temperature tolerances of various semiconductors were also then shown, with gallium arsenide, gallium nitride, silicon carbide and diamond being capable of operating at much higher temperatures than silicon. One of the key design issues for high-temperature electronics was the need accommodate the high-thermal stresses that could be encountered in some assemblies due to thermal expansion mismatches. Many organic materials were unsuitable for higher temperature assemblies and an alternative possibility was gold-silicon eutectic bonding, although it was more limited to smaller devices (e.g. <8×8 mm). Brazing and direct copper bonding offered other suitable joining approaches. An example of a silicon carbide wafer brazed onto a tungsten substrate was shown. It was also possible to weld directly to certain ceramics, e.g. ultrasonic bonding of aluminium to alumina. Other bonding techniques that could be used included friction welding and diffusion bonding. Thermal expansion mismatch issues could be reduced by employing interlayers and TWI were investigating the use of carbon nanotubes in a composite structure to provide a high-thermal conductivity interface. Norman then discussed the various interconnect options that were suitable for high-temperature electronics and he highlighted some of the possible wire and pad combinations. Package sealing could be achieved using existing techniques and materials, although the use of polymer-based materials might be limited, depending on the temperature; conventional brazing and welding techniques were probably more suitable. The final area discussed was the provision of external interconnects and this had traditionally been achieved using solders. Suitable alternatives could include friction acoustic bonding and welding. Another option to overcome some of the problems was to remove the joints, or as many of them as possible, e.g. via the use of high-density packaging and the use of embedded passive devices. The presentation concluded with a presentation of the general thermal material hierarchy. Solder technology would not be easily replaced in high-volume PCB applications but, for high-temperature electronics, there were a number of viable alternatives to solder for joining and interconnections that needed to operate at above 200°C.

The penultimate presentation of the day was from Mike Fenner of Indium Corporation who spoke on “Bonding with nanotechnology”. He began by introducing the concept of nanobonding using “NanoFoil” in a joint forming exothermic reaction similar to the “thermite” process. A practical demonstration of two pieces of aluminium being instantly joined was given, with the reaction being initiated with an electrical input from a PP3 battery. The advantages of the nanobond process were then described and these included the fact that components were not exposed to reflow temperatures. It was a flux-free process, was suitable for materials with dissimilar CTEs and gave a thermal conductivity six to ten times better than other materials, e.g. non-conductive adhesives, used in this type of application. The technology had originally been developed for joining large areas of dissimilar materials such as sputtering targets. Because the nanobonding process was so rapid, there was no opportunity for the typical stresses to develop. Examples of the benefits of using “NanoFoil” were then described and the first one was in the attachment of LEDs to a substrate, thereby avoiding conventional soldering temperatures that could damage the LED’s lens; assembly yield improvements of 15-20 per cent had also been achieved and there was no drop in light output. The technology had been used in LED traffic and streetlights. Automated nanobond assembly equipment had been developed that used a conventional tape and reel approach and it was being used in power die attach and thermal management applications. The technology was currently at the prototype stage and still relatively expensive compared to solder, although prices were expected to drop as the production was ramped up.

The final presentation of the seminar was entitled “Optimisation of a process for a fine pitch ICA interconnection scheme for the assembly of pyroelectric thermal sensing arrays” and was given by Alan Butler of Irisys. A basic outline of the overall process developed by Irisys and the structure of the assembled devices were shown and then the individual stages of the process were described in more detail. Printing was performed using a DEK260 printer tooled for 150-mm wafer printing. The ICA bumps were then characterised using various techniques including optical profilometry. Ceramic die placement onto the silicon was achieved using a customised die bonder with an ultra-light pressure. Yield improvements had been achieved via attention to the stencil surface texture and aperture shape; it had been found that a poorly formed stencil gasket could damage the surface of the silicon. Overall, a high yield, reliable process had been developed with print yield defect issues being <30 ppm. Building on this work with 16×16 arrays at 500 μm pitch, progress had been made to 47×47 arrays, which had a much finer pitch of 170 μm and a bump diameter of only 85 μm. An example of this array was shown and the reliability and yields were also acceptable, although not quite as good as for the 16×16 arrays. Further, pitch reductions would be possible, but there were a number of factors that needed to be taken into account in order to achieve the required reliability and yields.

Chris Hunt then introduced a closing panel discussion session in which the speakers (Figure 2) answered a series of questions that focussed on future packaging opportunities. These were thought to be mainly in the automotive, oil and gas and medical areas, amongst others. At the end of this session, the seminar was brought to a close.

In summary, this highly interesting seminar provided a lot of useful information on the wide range of materials and process technologies that could be successfully used as alternatives to conventional solders in a wide range of electronics assembly applications. IMAPS are to be congratulated for organising a seminar that had such a wide appeal that it was oversubscribed. Nevertheless, the 60 or so attendees that were fortunate enough to attend were able to benefit from a highly pertinent and well-organised event.

 Figure 2 L to R: speakers Chris Hunt, Alan Butler, Mark Currie, Simon
Broadhurst, Norman Stockham, Andy Longford and Martin Wickham

Figure 2 L to R: speakers Chris Hunt, Alan Butler, Mark Currie, Simon Broadhurst, Norman Stockham, Andy Longford and Martin Wickham

Martin Goosey30 June 2010

For more information, please visit: www.npl.co.uk/; www.lboro.ac.uk/research/iemrc/; www.imaps.org/

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