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When a sensor device is packaged together with a CPU, it is called a “smart sensor.” The sensors really become smart when the tight integration of sensing and processing results in an adaptive sensing system that can react to environmental conditions and consistently deliver useful measurements to a robotic system even under the harshest of the conditions. We illustrate this point with an example from our recent work on illumination‐adaptive algorithm for dynamic range compression that is well suited for an on‐chip implementation resulting in a truly smart image sensor. Our method decides on the tonal mapping for each pixel based on the signal content in pixel's local neighborhood.

The purpose of this study is to propose a pulse width based, in-pixel, arbitrary size kernel convolution processor. When image sensors are used in machine vision tasks, large amount of data need to be transferred to the output and fed to a processor. Basic and low-level image processing functions such as kernel convolution is used extensively in the early stages of most machine vision tasks. These low-level functions are usually computationally extensive and if the computation is performed inside every pixel, the burden on the external processor will be greatly reduced.

In the proposed architecture, digital pulse width processing is used to perform kernel convolution on the image sensor data. With this approach, while the photocurrent fluctuations are expressed with changes in the pulse width of an output signal, the small processor incorporated in each pixel receives the output signal of the corresponding pixel and its neighbors and produces a binary coded output result for that specific pixel. The process is commenced in parallel among all pixels of the image sensor.

It is shown that using the proposed architecture, not only kernel convolution can be performed in the digital domain inside smart image sensors but also arbitrary kernel coefficients are obtainable simply by adjusting the sampling frequency at different phases of the processing.

Although in-pixel digital kernel convolution has been previously reported however with the presented approach no in-pixel analog to binary coded digital converter is required. Furthermore, arbitrary kernel coefficients and scaling can be deployed in the processing. The given architecture is a suitable choice for smart image sensors which are to be used in high-speed machine vision tasks.

The understandable recent trend in sensor design has been to exploit the rapid advance in digital electronics to reduce reliance on analogue circuits. In contrast to this general trend some researchers have been inspired by biological systems to design smart imaging sensors based upon collective analogue computation in networks of resistors. This has resulted in sensor designs which efficiently extract information from a large volume of data whilst reducing manufacturing costs by improving yield.

The smart image sensor (SIS) which integrated with both sensor and smart processor has been widely applied in vision-based intelligent perception. In these applications, the linearity of the image sensor is crucial for better processing performance. However, the simple source-follower based readout circuit in the conventional SIS introduces significant nonlinearity. This paper aims to design a low-power in-pixel buffer circuit applied in the high-linearity SIS for the smart perception applications.

The linearity of the SIS is improved by eliminating the non-ideal effects of transistors and cancelling dynamic threshold voltage that changes with the process variation, voltage and temperature. A low parasitic capacitance low leakage switch is proposed to further improve the linearity of the buffer. Moreover, an area-efficient SIS architecture with a sharing mechanism is presented to further reduce the number of in-pixel transistors.

A low parasitic capacitance low leakage switch and a gate-source voltage pre-storage method are proposed to further improve the linearity of the buffer. Nonlinear effects introduced by parasitic capacitance switching leakage, etc., have been investigated and solved by proposing low-parasitic and low-leakage switches. The linearity is improved without a power-hungry operational amplifier-based calibration circuit and a noticeable power consumption increment.

The proposed design is implemented using a standard 0.18-µm CMOS process with the active area of 102 µm². At the power consumption of 5.6 µW, the measured linearity is −63 dB, which is nearly 27 dB better than conventional active pixel sensor (APS) implementation. The proposed low-power buffer circuit increase not only the performance of the SIS but also the lifetime of the smart perception system.

The purpose of this paper is to design a kernel convolution processor. High-speed image processing is a challenging task for real-time applications such as product quality control of manufacturing lines. Smart image sensors use an array of in-pixel processors to facilitate high-speed real-time image processing. These sensors are usually used to perform the initial low-level bulk image filtering and enhancement.

In this paper, using pulse-width modulated signals and regular nearest neighbor interconnections, a convolution image processor is presented. The presented processor is not only capable of processing arbitrary size kernels but also the kernel coefficients can be any arbitrary positive or negative floating number.

The performance of the proposed architecture is evaluated on a Xilinx Virtex-7 field programmable gate array platform. The peak signal-to-noise ratio metric is used to measure the computation error for different images, filters and illuminations. Finally, the power consumption of the circuit in different operating conditions is presented.

The presented processor array can be used for high-speed kernel convolution image processing tasks including arbitrary size edge detection and sharpening functions, which require negative and fractional kernel values.

This paper aims to reveal developments in sensors applied to packaging lines.

Machine vision systems including special‐purpose smart cameras and a high‐speed camera are examined. The technology of radio frequency identification (RFID) is explained, and some products relevant to packaging are highlighted. Advances in X‐ray, metal detection and gas‐leak detection equipment are discussed.

Manufacturers are making smart cameras and high‐speed cameras easier to use. There is a trend for manufacturers to provide portable as well as in‐line instrumentation, for example, in code readers and gas leak detectors. RFID is an emerging technique for improving traceability in the supply chain, and some labelling machines additionally program an embedded chip.

Tracks the latest developments in sensors for engineers in the food and pharmaceutical packaging industries.

The purpose of this paper is to present a novel image‐labeling CMOS sensor for modulated marker detection.

An image scene with multiple objects, each identified by a flashing light‐emitting diode (LED), is captured by the sensor. The LED's frequency is a representation of the object ID‐tag. The sensor detects and labels the objects by identifying the signal frequencies. The processing is performed in‐pixel and, since the object detection task is simplified, power dissipation is reduced. A 64×64 pixel sensor is designed in the 0.6 μm CMOS technology.

Simulation results show successful object identification. At a frame rate of 250 fps the measured power consumption is 11 mW, which is less than those of the previously reported object detection solutions. The application of the presented sensor is shown in several different robotic fields such as unmanned aerial vehicles (UAVs) vision, household robots and industrial robots. It is also explained how the sensor can be used for low‐power localization and position detection of the robot vehicles.

The paper shows that the sensor is a suitable solution for low‐power landmark detection and robot localization.

Fixed mode noise and random mode noise always exist in the image sensor, which affects the imaging quality of the image sensor. The charge diffusion and color mixing between pixels in the photoelectric conversion process belong to fixed mode noise. This study aims to improve the image sensor imaging quality by processing the fixed mode noise.

Through an iterative training of an ergoable long- and short-term memory recurrent neural network model, the authors obtain a neural network model able to compensate for image noise crosstalk. To overcome the lack of differences in the same color pixels on each template of the image sensor under flat-field light, the data before and after compensation were used as a new data set to further train the neural network iteratively.

The comparison of the images compensated by the two sets of neural network models shows that the gray value distribution is more concentrated and uniform. The middle and high frequency components in the spatial spectrum are all increased, indicating that the compensated image edges change faster and are more detailed (Hinton and Salakhutdinov, 2006; LeCun et al., 1998; Mohanty et al., 2016; Zang et al., 2023).

In this paper, the authors use the iterative learning color image pixel crosstalk compensation method to effectively alleviate the incomplete color mixing problem caused by the insufficient filter rate and the electric crosstalk problem caused by the lateral diffusion of the optical charge caused by the adjacent pixel potential trap.

Outlines the factors causing the automotive industry to increase machine vision application, reviews new developments in vision technology that are targeted at expanding and improving it use in the automotive industry, reports on an innovative application of vision guided robotics at DaimlerChrysler

This paper proposes the adoption of Industry 4.0 (I4) technologies and lean techniques for improving operational performance in the healthcare sector.

The research adopted a systematic literature review and feedback of healthcare professionals to identify the inefficiencies in the current healthcare system. A questionnaire was used to get feedback from the patients and the hospital staff about the current practices and issues, and the expected impact of technology on existing practices. Data were analysed using descriptive statistics, correlation analysis and multiple regression analysis.

The results indicate that I4 technologies lead to the improvement of the operational performance, and the perceptions about I4 technologies are made through the pre-medical diagnosis. However, a weak correlation between lean practices and healthcare operational performance compared to that of I4 technologies and operational performance indicate that lean practices are not fully implemented in the Sri Lankan healthcare sector to their full potential.

This study is limited to two government hospitals, with insights from only the doctors and nurses in Sri Lanka. Furthermore, the study is limited to only selected aspects of I4 technologies (big data, cloud computing and IoT) and lean concepts (value stream mapping and 5S). Therefore, recommendations on the adoption of I4 technologies in the healthcare sector need to be made within the scope of the study investigation.

The implementation of I4 technologies needs careful consideration of process improvement as part of the overall plan for achieving the maximum benefits of technology adoption.

The findings of the research can be used as a benchmark/guide for other hospitals to explore the adoption of I4 technologies, and how process improvement from lean concepts could influence the overall operational performance.