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Article
Publication date: 23 November 2021

Xiuqian Wu, Dehong Ye, Hanmin Zhang, Li Song and Liping Guo

This paper aims to investigate the root causes of and implement the improvements for the inter layer dielectric (ILD) crack for LQFP C90FG (CMOS90 Floating Gate) wafer technology…

Abstract

Purpose

This paper aims to investigate the root causes of and implement the improvements for the inter layer dielectric (ILD) crack for LQFP C90FG (CMOS90 Floating Gate) wafer technology devices in copper wire bonding process.

Design/methodology/approach

Failure analysis was conducted including cratering, scanning electron microscopy inspection and focus ion beam cross-section analysis, which showed ILD crack. Root cause investigation of ILD crack rate sudden jumping was carried out with cause-and-effect analysis, which revealed the root cause is shallower lead frame down-set. ILD crack mechanism deep-dive on ILD crack due to shallower lead frame down-set, which revealed the mechanism is lead frame flag floating on heat insert. Further investigation and energy dispersive X-ray analysis found the Cu particles on heat insert is another factor that can result in lead frame flag floating.

Findings

Lead frame flag floating on heat insert caused by shallower lead frame down-set or foreign matter on heat insert is a critical factor of ILD crack that has never been revealed before. Weak wafer structure strength caused by thinner wafer passivation1 thickness and sharp corner at Metal Trench (compared with the benchmarking fab) are other factors that can impact ILD crack.

Originality/value

For ILD crack improvement in copper wire bonding, besides the obvious factors such as wafer structure and wire bonding parameters, also should take other factors into consideration including lead frame flag floating on heat insert and heat insert maintenance.

Details

Microelectronics International, vol. 39 no. 1
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 27 June 2022

Rong Wang, Yongxiong Chen, Xiuqian Peng, Nan Cong, Delei Fang, Xiubing Liang and Jianzhong Shang

Three-dimensional (3D) printing provides more possibilities for composite manufacturing. Composites can no longer just be layered or disorderly mixed as before. This paper aims to…

Abstract

Purpose

Three-dimensional (3D) printing provides more possibilities for composite manufacturing. Composites can no longer just be layered or disorderly mixed as before. This paper aims to introduce a new algorithm for dual-material 3D printing design.

Design/methodology/approach

A novel topology design method: solid isotropic material with penalization (SIMP) for hybrid lattice structure is introduced in this paper. This algorithm extends the traditional SIMP topology optimization, transforming the original 0–1 optimization into A–B optimization. It can be used to optimize the spatial distribution of bi-material composite structures.

Findings

A novel hybrid structure with high damping and strength efficiency is studied as an example in this work. By using the topology method, a hybrid Kagome structure is designed. The 3D Kagome truss with face sheet was manufactured by selective laser melting technology, and the thermosetting polyurethane was chosen as filling material. The introduced SIMP method for hybrid lattice structures can be considered an effective way to improve lattice structures’ stiffness and vibration characteristics.

Originality/value

The fabricated hybrid lattice has good stiffness and damping characteristics and can be applied to aerospace components.

Details

Rapid Prototyping Journal, vol. 28 no. 10
Type: Research Article
ISSN: 1355-2546

Keywords

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