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Article
Publication date: 9 November 2012

Uroš Flisar, Danijel Vončina and Peter Zajec

The purpose of this paper is to investigate the impact of different distribution of shoot through mode on Z‐source inverter efficiency and particularly on complexity of…

Abstract

Purpose

The purpose of this paper is to investigate the impact of different distribution of shoot through mode on Z‐source inverter efficiency and particularly on complexity of switching pattern generation. Switching pattern generation has been optimized for field‐oriented control (FOC) of induction motor operating beyond its nominal speed which can be easily accomplished due to the input voltage boosting implemented inherently by Z‐source inverter. The proposed drive is unaffected to supply voltage sags, too.

Design/methodology/approach

The space vector modulation switching pattern of the traditional FOC drive was modified in order to insert shoot through mode necessary for input voltage boosting. Since this can be accomplished only on account of zero mode of the inverter, the active modes have to be reduced. Consequently, the output voltage space vector has to be reduced, as well.

Findings

In order to maximize profit of the input DC voltage and to omit the output voltage distortion, mathematical limitations have been derived giving the optimal boost ratio for required output voltage and ride‐through capability during voltage sags.

Practical implications

The experimental tests of upgraded FOC of induction motor with the proposed distribution of shoot through mode in the switching pattern of Z‐source inverter and optimized control of inverter voltage are demonstrated. It is also shown that such a drive can withstand a long period of input voltage sags and operate in a broader field weakening regime.

Originality/value

The paper's value lies in the overall, DSP‐based control of the induction motor supplied with Z‐source inverter gaining the maximum utilization of the input DC supply source and optimum trade‐off between inverter efficiency and inverter components voltage stress.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 31 no. 6
Type: Research Article
ISSN: 0332-1649

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Article
Publication date: 24 July 2020

Ashraf Yahya, Syed M. Usman Ali and Muhammad Farhan Khan

Multilevel inverter (MLI) is an established design approach for inverter applications in medium-voltage and high-voltage range of applications. An asymmetric design…

Abstract

Purpose

Multilevel inverter (MLI) is an established design approach for inverter applications in medium-voltage and high-voltage range of applications. An asymmetric design synthesizes multiple DC input voltage sources of unequal magnitudes to generate a high-quality staircase sinewave comprising a large number of steps or levels. However, the implications of using sources of unequal magnitudes results in the requirements of a large variety of inverter switches and higher magnitudes of the total blocking voltage (TBV) rating of the inverter, which increase the cost. The purpose of this study is to present a solution based on algorithms for establishing DC source magnitudes and other design parameters.

Design/methodology/approach

The approach used in this study is to develop algorithms that bring an asymmetric cascaded MLI (ACMLI) design close to symmetric design. This approach then reduces the variety of switch ratings and minimizes the TBV of the inverter. Thus, the benefits of both asymmetric design (generation of a large number of voltage levels in the output waveform) and symmetric design (modularity) are achieved. The proposed algorithms can be applied to a number of ACMLI topologies, including classical cascaded H-bridge (CHB). The effectiveness of the proposed algorithms is validated by simulation in Matlab-Simulink and experimental setup.

Findings

Two new algorithms are proposed that reduce the number of variety of switches to just three. The variety can further be reduced to two under a specified condition. The algorithms are compared with the existing ones, and the results are promising in minimizing the TBV rating of the inverter, which results in cost reduction as well. For a specific case of four CHBs, the proposed Algorithm-1 produced 27% and Algorithm-2 produced 53% higher levels. Moreover, the presented algorithms produced minimum values of the TBV and resulted in minimum cost of inverter.

Originality/value

The proposed algorithms are novel in structure and have achieved the targeted values of minimized switch variety and reduced TBV ratings. Due to less variety, the inverter achieves a near symmetric design, which enables to attain the added advantages of modularity and reduced difference of power sharing among the DC sources.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering , vol. 39 no. 4
Type: Research Article
ISSN: 0332-1649

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Article
Publication date: 29 July 2020

Eralp Sener and Gurhan Ertasgin

This paper aims to present an inverter with a current-source input for 400 Hz avionic systems to have a system which removes DC-link capacitors and presents a high efficiency.

Abstract

Purpose

This paper aims to present an inverter with a current-source input for 400 Hz avionic systems to have a system which removes DC-link capacitors and presents a high efficiency.

Design/methodology/approach

A battery-powered DC link inductor generates a constant-current source. A single high-frequency switch is used to provide a sinusoidally modulated current before the inverter. The output of the switch is “unfolded” by a thyristor-based H-bridge inverter to generate an AC output current. The system uses a CL low-pass filter to obtain a 400 Hz pure sine wave by removing pulse width modulation components.

Findings

Simulations and Typhoon HIL real-time experiments were performed with closed-loop control to validate the proposed inverter concept while meeting the critical standards of MIL-STD-704F.

Originality/value

This current source inverter topology is suitable for avionic systems that require 400 Hz output frequency. The topology uses small DC-link inductor and eliminates bulky capacitor which determines the inverter lifetime.

Details

Aircraft Engineering and Aerospace Technology, vol. 92 no. 8
Type: Research Article
ISSN: 1748-8842

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Article
Publication date: 5 September 2016

F.X. Edwin Deepak and V. Rajasekaran

The purpose of this paper is to present the three phase seven-level Z-source neutral point clamped (NPC) inverter with multicarrier pulse-width modulation (PWM) technique…

Abstract

Purpose

The purpose of this paper is to present the three phase seven-level Z-source neutral point clamped (NPC) inverter with multicarrier pulse-width modulation (PWM) technique. Despite numerous topologies and modulation methods, there is a dire need of developing PWM techniques that can be deployed in multilevel inverters. These inverters decrease the total harmonic distortion and it has a good performance for various electrical power system applications. The proposed inverter is investigated for its performance by executing it in shoot through and non-shoot through modes.

Design/methodology/approach

The purpose is validated through MATLAB/Simulink software platform for implementing the proposed seven-level Z-source NPC inverter outlined with multicarrier based phase disposition technique. The experimental results are verified using SPARTAN 3E FPGA controller with the same control strategy.

Findings

The efficiency of the proposed inverter is confirmed in terms of increased and faster conversion in the shoot-through mode. By using PDPWM technique the maximum boost gain is achieved with lower modulation index. High control of DC voltage is obtained with only one DC voltage source and one Z network.

Originality/value

Three phase multilevel inverters are widely used in improving the output voltage quality and reducing the encountered electromagnetic interference in electronic device or circuitry. They are employed in medium and high –power applications to attain increased power ratings while decreasing the switching losses. The performance results shown in this paper will satisfy the above needs of usage in certain applications and less switching losses.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 35 no. 5
Type: Research Article
ISSN: 0332-1649

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Article
Publication date: 6 July 2015

K. Chitra and A. Jeevanandham

The purpose of this paper is to present the Switched Inductor Z-Source Inverter (SLZSI) topology for three-phase on-line uninterruptible power supply (UPS) by employing…

Abstract

Purpose

The purpose of this paper is to present the Switched Inductor Z-Source Inverter (SLZSI) topology for three-phase on-line uninterruptible power supply (UPS) by employing third harmonic injected maximum constant boost pulse width modulation (PWM) control. Conventional UPS consists of step-up transformer or boost chopper along with voltage source inverter (VSI) which reduces the efficiency and increases energy conversion cost. The proposed three-phase UPS by using SLZSI has the voltage boost capability through shoot through zero state which is not available in traditional VSI and current source inverter.

Design/methodology/approach

Performance of three-phase on-line UPS based on ZLZSI by using third harmonic injected maximum constant boost PWM control is analyzed and evaluated in MATLAB/Simulink software and the results are compared with Z-source inverter (ZSI) fed UPS. Experimental results are presented for the validation of the simulation and theoretical analysis.

Findings

The output voltages, currents, THD values, voltage stress and efficiencies for different loading condition are determined and compared with the theoretical values and UPS with ZSI. The experimental results validate the theoretical and simulation results.

Originality/value

Compared with the traditional ZSI, the SLZSI provides high-voltage boost inversion ability with a very short shoot through zero state. This proposed UPS by using SLZSI increases the efficiency with less number of components, reduces the harmonics, increases the voltage gain and reduces the voltage stress.

Details

COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering, vol. 34 no. 4
Type: Research Article
ISSN: 0332-1649

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Article
Publication date: 8 March 2011

Arash Abbasalizadeh Boora, Firuz Zare and Arindam Ghosh

Multi‐level diode‐clamped inverters have the challenge of capacitor voltage balancing when the number of DC‐link capacitors is three or more. On the other hand…

Abstract

Purpose

Multi‐level diode‐clamped inverters have the challenge of capacitor voltage balancing when the number of DC‐link capacitors is three or more. On the other hand, asymmetrical DC‐link voltage sources have been applied to increase the number of voltage levels without increasing the number of switches. The purpose of this paper is to show that an appropriate multi‐output DC‐DC converter can resolve the problem of capacitor voltage balancing and utilize the asymmetrical DC‐link voltages advantages.

Design/methodology/approach

A family of multi‐output DC‐DC converters is presented in this paper. The application of these converters is to convert the output voltage of a photovoltaic (PV) panel to regulate DC‐link voltages of an asymmetrical four‐level diode‐clamped inverter utilized for domestic applications. To verify the versatility of the presented topology, simulations have been directed for different situations and results are presented. Some related experiments have been developed to examine the capabilities of the proposed converters.

Findings

The three‐output voltage‐sharing converters presented in this paper have been mathematically analysed and proven to be appropriate to improve the quality of the residential application of PV by means of four‐level asymmetrical diode‐clamped inverter supplying highly resistive loads.

Originality/value

This paper shows that an appropriate multi‐output DC‐DC converter can resolve the problem of capacitor voltage balancing and utilize the asymmetrical DC‐link voltages advantages and that there is a possibility of operation at high‐modulation index despite reference voltage magnitude and power factor variations.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 30 no. 2
Type: Research Article
ISSN: 0332-1649

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Article
Publication date: 8 May 2018

Henda Jabberi and Faouzi Ben Ammar

To improve the voltage quality in AC adjustable high-power-speed-drive applications, the purpose of the paper is to provide a large number of output levels without…

Abstract

Purpose

To improve the voltage quality in AC adjustable high-power-speed-drive applications, the purpose of the paper is to provide a large number of output levels without increasing the number of commutation cells in the three-phase, n-cells flying capacitor voltage source asymmetric Multilevel Inverter (MI). The concept is based on the selection of different ratios between the breakdown voltages of two successive power devices. The new mathematical model is developed under various ratios, allows a thorough investigation of the harmonic distortions, flying capacitor energy storage, flying capacitor voltage balancing controllability and blocking voltage insulated gate bipolar transistor (IGBT) capability.

Design/methodology/approach

The asymmetrical design provides a large number of output levels without increasing the number of commutation cells. The important new analytical expression of capacitors voltage distribution is derived and extended to any ratio between the switch breakdown voltages of two successive power devices.

Findings

The detailed simulation study of the proposed concept has been carried out using MATLAB/Simulink. The power switches control of the three-phase three-cell MI is assured by new phase-shifted-multi-carrier pulse width modulation. The space vector representation is used to show the regular and irregular step output voltage in the complex plan (α,β).

Originality/value

In the paper, the n cells flying capacitor inverter, which typically operates in the (n + 1) levels mode, was extended to (n + 2), (n + 3) … until 2n levels with regular or irregular step output voltage. Consequently, the claimed advantages of the asymmetric MI are to improve power quality by reducing harmonic distortions and to reduce the requirement on capacitive energy storage in the circuit.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 37 no. 3
Type: Research Article
ISSN: 0332-1649

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Article
Publication date: 11 February 2019

Kanungo Barada Mohanty, Kishor Thakre, Aditi Chatterjee, Ashwini Kumar Nayak and Vinaya Sagar Kommukuri

This study aims to propose a modified topology for an asymmetric multilevel inverter as a basic module that generates 13-level output voltage waveform. The basic module…

Abstract

Purpose

This study aims to propose a modified topology for an asymmetric multilevel inverter as a basic module that generates 13-level output voltage waveform. The basic module consists of eight switches (unidirectional and bidirectional switch) and four DC voltage sources with unequal magnitudes. The proposed topology reduces the number of switches, isolated DC sources, cost and size of the circuit significantly as compared to other topologies. In addition, the proposed circuit provides a modular structure for a multilevel inverter.

Design/methodology/approach

The proposed configuration is implemented through simulation and hardware development of a single-phase 13-level inverter prototype. A multicarrier-based pulse width modulation scheme is adopted for generating switching signals by using dSPACE real-time controller.

Findings

To demonstrate the advantages of the proposed configuration, a comparative analysis is carried out with other multilevel topologies in terms of number of switches, gate driver circuits, on-state switches and blocking voltage on the switches. The comparison results confirmed that the proposed configuration requires less number of components for the same number of voltage levels. Moreover, the peak inverse voltage on switches and losses is lower in the proposed configuration.

Originality/value

In the available literature, numerous topologies are presented with main emphasis on the reduced components count. In this study, the authors proposed a new topology for an asymmetrical source configuration. The performance of the proposed topology under steady-state and dynamic conditions is evaluated using simulation and experimental implementation.

Details

World Journal of Engineering, vol. 16 no. 1
Type: Research Article
ISSN: 1708-5284

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Article
Publication date: 24 October 2019

Ali Teta, Abdellah Kouzou and Mohamed Mounir Rezaoui

This paper aims to propose a new configuration of a shunt active power filter (SAPF) connected with a photovoltaic (PV) system through a Z-source inverter (ZSI) topology…

Abstract

Purpose

This paper aims to propose a new configuration of a shunt active power filter (SAPF) connected with a photovoltaic (PV) system through a Z-source inverter (ZSI) topology. This topology ensures a single-stage operation and overcomes the limitations of the conventional two-stage operation topologies based on the DC–DC boost converter. The proposed system is designed for the purpose of reducing the total harmonic distortion of the source current by eliminating the current harmonics and exploiting the solar irradiation.

Design/methodology/approach

First, all the main parts of the proposed shunt active power filter are fully described in this paper, and then a PV system based on a Z-source inverter with a maximum power point tracking controller is used to exploit the solar irradiance and solve the problem of discharging of the direct current (DC) capacitor during the filtering process.

Findings

From the extensive simulation tests carried out using MATLAB/Simulink, the obtained results prove that the proposed shunt active power filter performs well despite several operation scenarios, including different load types and under abrupt irradiance.

Originality/value

A new shunt active power filter configuration has been proposed. This configuration benefits from the solar irradiation and overcomes the drawbacks of the conventional configurations by using the Z-source inverter instead of the voltage source inverter and DC–DC boost converter.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering , vol. 38 no. 6
Type: Research Article
ISSN: 0332-1649

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Article
Publication date: 9 November 2012

Redha Benachour, Saïda Latreche, Mohamed El Hadi Latreche and Christian Gontrand

The present work aims to explain how the nonlinear average model can be used in power electronic integration design as a behavioral model.

Abstract

Purpose

The present work aims to explain how the nonlinear average model can be used in power electronic integration design as a behavioral model.

Design/methodology/approach

The nonlinear average model is used in power electronic integration design as a behavioral model, where it is applied to a voltage source inverter based on IGBTs. This model was chosen because it takes into account the nonlinearity of the power semiconductor components and the wiring circuit effects, which can be formalized by the virtual delay concept. In addition, the nonlinear average model cannot distinguish between slow and quick variables and this is an important feature of the model convergence.

Findings

The paper studies extensively the construction of the nonlinear average model algorithm theoretically. Detailed explanations of the application of this model to voltage source inverter design are provided. The study demonstrates how this model illustrates the effect of the nonlinearity of the power semiconductor components' characteristics on dynamic electrical quantities. It also predicts the effects due to wiring in the inverter circuit.

Research limitations/implications

More simulations and experimental analysis are still necessary to improve the model's accuracy, by using other static characteristic approaches, and to validate the applicability of the model to different converter topologies.

Practical implications

The paper formulates a simple nonlinear average model algorithm, discussing each step. This model was described by VHDL‐AMS. On the one hand, it will assist theoretical and practical research on different topologies of power electronic converters, particularly in power integration systems design such as the integrated power electronics modules (IPEM). On the other hand, it will give designers a more precise behavioral model with a simpler design process.

Originality/value

The nonlinear average model used in power electronic integration design as behavioral model is a novel approach. This model reduces computational costs significantly, takes physical effects into account and is easy to implement.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 31 no. 6
Type: Research Article
ISSN: 0332-1649

Keywords

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