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The measurement of heat flux is of importance to the development of aerospace engine as basic physical quantities in extreme environment. Heat radiation is one of the basic forms of heat transfer phenomenon. The structure optimizing can improve the performance and infrared absorptivity of the thin film sensor.

This paper designed one kind of thin film heat flux sensor (HFS) with antireflective coating based on transparent conductive oxide thermopile. The introduced membrane structure is so thin that it has little impact on sensor performance. Fabrication of thin film sensors were fabricated by physical vapor deposition (PVD) process.

The steady-state and dynamic response characteristics of the HFS were investigated by calibration platform. The experimental results shown that the absorptivity of the membrane structure (for1070nm) improved compared with that before optimization. The sensitivity of heat flux gauge was 48.56 µV/ (kW/m2) and its frequency response was determined to be about 1980 Hz.

The thin film HFS uses thermopile based on Indium Tin Oxid and In2O3. The antireflective coating is introduced to hot endpoint of HFS to improve sensitivity on laser thermal source. The infrared optical properties of membrane layer structure were investigated. The steady-state and the transient response characteristics of the heat flux sensor were also investigated.

This paper gives a popular introduction to thin film and some reasons for using this technology. The miniaturisation techniques at Brel & Kjaer are described and the background for the work with thin film techniques is given. The company's method of realising thin film circuits is described by going through the resistor materials, resistor design and photolithography and etching steps. The kind of equipment needed and what B & K use to make prototypes and small scale production are shown. TCR‐values and the resistor stability after 10,000 hours at different environmental exposures are given. Examples of applications with single layer and double layer structures are shown. A thick film circuit is transformed to thin film, and the size reduction can be seen. Finally, for this circuit, the cost calculations are stated for both versions.

Coating and lithography steps in thin‐film processing require planar and smooth surfaces. Usually ceramic substrates with as‐fired surface roughness of R_a < 0.1µm or with polished surfaces for advanced requirements are used. In general, a thick‐film hybrid has an inappropriate surface for further successful thin‐film processing. In this work, the influence of surface roughness and topography on the properties of thin‐film conductors and the fabrication of vias is investigated. Surface smoothing and local planarisation can be achieved by the use of a thick‐film overglaze or by coating the surface with polyimide prior to thin‐film processing. The improvements in conductor and via yield are measured by adequate test structures with a conductor width of 25µm. Based on the results, a process is given to provide a thick‐film multilayer with a sufficient smooth and planar surface suitable for thin‐film processes.

A novel interconnect technology, introducing thin film on a laminate substrate base, is presented. A specially constructed laminate board is used as a substrate for the thin film build‐up process. The main characteristics of the laminate core substrate are the z‐axis electrical connections, the absence of holes in the substrate and the very flat nature of the top surface. As a result, the base substrate can be processed further in a thin film processing line. The manufacturing and properties of these substrates are discussed.

The purpose of this paper is a new thin-film based sensor proposed for sensitive and selective detection of mercury (Hg²⁺) ions in water. The thin-film platform is easy to use and quick for heavy metal ions (HMIs) detection in the picomolar range. Ion-selective self-assembled monolayer's (SAM) of thiol used for the detection of HMIs above the Au/Ti top surface.

A thin-film based platform is suitable for the on-field experiments and testing of water samples. HMIs (antigen) and thiol-based SAM (antibody) interaction results change in surface morphology and topography. In this study, the authors have used different characterization techniques to check the selectivity of the proposed method. This change in the morphology and topography of thin-film sensor checked with Fourier-transform infrared spectroscopy, surface-enhanced Raman scattering spectroscopy, atomic force microscopy and scanning electron microscopy with energy dispersive x-ray analysis used for high-resolution images.

This thin-film based platform is straightforward to use and suitable for real-time detection of HMIs at the picomolar range. This thin-film based sensor platform capable of achieving a lower limit of detection (LOD) 27.42 ng/mL (136.56 pM) using SAM of Homocysteine-Pyridinedicarboxylic acid to detect Hg²⁺ ions.

A thin-film based technology is perfect for real-time testing and removal of HMIs, but the LOD is higher as compared to microcantilever-based devices.

The excessive use and commercialization of nanoparticle (NPs) are quickly expanding their toxic impact on health and the environment. The proposed method used the combination of thin-film and NPs, to overcome the limitation of NPs-based technique and have picomolar (136.56 pM) range of HMIs detection. The proposed thin-film-based sensor shows excellent repeatability and the method is highly reliable for toxic Hg²⁺ ions detection. The main advantage of the proposed thin-film sensor is its ability to selectively remove the Hg²⁺ ions from water samples just like a filter and a sensor for detection at picomolar range makes this method best among the other current-state of the art techniques.

Embedded passives account for a very large part of today's electronic assemblies. This is particularly true for products such as cellular phones, camcorders, computers, and several critical defence devices. Market pressures for new products with more features, smaller size and lower cost demand smaller, compacter, simpler substrates. An obvious strategy is to reduce the number of surface mounted passives by embedding them in the substrate. In addition, current interconnect technology to accommodate surface mounted passives imposes certain limits on board design which constrain the overall system speed. Embedding passives is one way to minimize the functional footprint while at the same time improving performance. The purpose of this paper is to describe the development of a thin film technology based on ferroelectric‐epoxy polymer‐based flake‐free resin coated copper capacitive (RC3) nanocomposites to manufacture multilayer embedded capacitors.

This paper discusses thin film technology based on RC3 nanocomposites. In particular, recent developments in high capacitance, large area, thin film passives, and their integration in system in a package (SiP) are highlighted.

A variety of RC3 nanocomposite thin films ranging from 8 to 50 microns thick were processed on copper substrates by liquid coating. Multilayer embedded capacitors resulted in high capacitances of 16‐28 nF. The fabricated test vehicle also included two embedded resistor layers with resistances in the range of 15 Ω to 100 kΩ. To enable high performance devices, an embedded resistor must meet certain tolerances. The embedded resistors can be laser trimmed to a tolerance of <5 percent, which is usually acceptable for most applications. An extended embedded passives solution has been demonstrated, both through its high wireability designs and package performance, to be perfectly suited for SiP applications.

This case study designed and fabricated an eight layer high density internal passive core and subsequently applied fine geometry three buildup layers to form a 3‐8‐3 structure. The passive core technology is capable of providing up to six layers of embedded capacitance and could be extended further.

A thin film technology based on ferroelectric‐epoxy polymer‐based flake‐free RC3 nanocomposites was developed to manufacture multilayer embedded capacitors. The overall approach lends itself to package miniaturization because capacitance can be increased through multiple layers and reduced thickness to give the desired values in a smaller area.

The paper describes the physical phenomena which influence the electrical and mechanical characteristics of low temperature coefficient, high stability thin metal resistive films. Emphasis is placed on the Matthiensen and Arrhenius rules in respect of resistivity and time‐temperature stabilities. The phenomena outlined are highly dependent on the deposition methods used and film properties are discusssed in terms of the film formation kinetics, substrates, and deposition technologies. The production of thin metal film resistive films based on these principles readily achieves temperature coefficients of <5 ppm/°C over the temperature range −55°C to + 155°C with load stress stabilities of <300 ppm with full dissipation, 155°C, 2000 hours, which is as good as bulk nickel‐chromium alloy foil.

This study aims to propose a methodology by integrating three approaches, namely, internal core technology, external knowledge flow and industrial technology development to help companies improve their decision-making quality for technology planning and enhance their research and development (R&D) portfolio efficiency.

The primary focus of this study is thin-film solar technology and patent data is retrieved from the United States Patent and Trademark Office (USPTO) database. This study presents a methodology based on the proposed integrated analysis method, constructed with patent indicators, centrality analysis of social networks and main path analysis.

The results of this study can be itemized as – the core technological competency: companies involved in two specific technology fields have lower strength in R&D portfolio than leading companies with single-core technology. Knowledge flow: most companies in a network are knowledge producers/absorbers and technological development: diverse source and sink nodes were identified in the global main path during 1997-2003, 2004-2010 and 2011-2017.

Latecomer companies can emulate leaders’ innovation and enhance their technological competence to seek niche technology. Using the global main path, companies monitor outdated technologies that can be replaced by new technologies and aid to plan R&D strategy and implement appropriate strategic decisions avoiding path dependency.

The knowledge accumulation process helps in identifying the change of position and the role of companies; understanding the trend of industrial technology knowledge helps companies to develop new technology and direct strategic decisions. The novelty of this research lies in the integrated approach of three methods aiding industries to find their internal core technical competencies and identify the external position in the competitive market.

This paper describes the processing and electrical characterisation of an interconnection substrate technology called Combifilm. The study focuses on digital applications. According to calculations, the conductivity of the reference plane is shown not to be critical in the low gigahertz range. Electrical measurements were performed at low and high frequencies (up to 5 GHz). Measurements of the attenuation were compared with calculations. Crosstalk measurements were carried out from different line pitches and compared with numerical calculations. It was determined that a line pitch of 300 μm would give sufficiently low crosstalk for many digital applications. The SUSPENS model was used to estimate the performance of different substrate technologies for modules with high speed ECL circuits. Two hypothetical systems with different wiring demands were studied for each technology. For a module with low or moderate wiring demands, Combifilm yielded a silicon efficiency (silicon‐to‐substrate ratio) and a clock rate that were between the PCB‐based chip‐on‐board technology and thin‐film multilayer technology. The estimated clock rate was about 60% of that of the wire‐bonded thin‐film module. The module size of Combifilm was shown to be sensitive to the wiring demand, and for a high wiring density case the estimated size was approximately the same as for a chip‐on‐board module.

The purpose of this research is to study the effect of thickness and surface properties of ZnO solid thin film for heat dissipation application in LED. Heat dissipation in electronic packaging can be improved by applying a thermally conductive interface material (TIM) and hence the junction temperature will be maintained. ZnO is one of the oxide materials and used as a filler to increase the thermal conductivity of thermal paste. The thickness of these paste-type material cannot be controlled which restricts the heat flow from the LED junction to ambient. The controlled thickness is only possible by using a solid thin-film interface material.

Radio Frequency (RF)-sputtered ZnO thin film on Cu substrates were used as a heat sink for high-power LED and the thermal performance of various ZnO thin film thickness on changing total thermal resistance (R _th-tot) and rise in junction temperature were tested. Thermal transient analysis was used to study the performance of the given LED. The influence of surface roughness profile was also tested on the LED performance.

The junction temperature was high (6.35°C) for 200 nm thickness of ZnO thin film boundary condition when compared with bare Cu substrates. Consecutively, low R _th-tot values were noticed with the same boundary condition. The 600 nm thickness of ZnO thin film exhibited high R _th-tot and interface resistance than the other thicknesses. Bond Line Thickness of the interface material was influenced on the interface thermal resistance which was decreased with increased BLT. Surface roughness parameter showed an immense effect on thermal transport, and hence, low R _th (47.6 K/W) value was noticed with low film roughness (7 nm) as compared with bare Cu substrate (50.8 K/W) where the surface roughness was 20.5 nm.

Instead of using thermal paste, solid thin film ZnO is used as TIM and coated Cu substrates were used as a heat sink. The thickness can be controlled, and it is a new approach for reducing the BLT between the metal core printed circuit board and heat sink.