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The purpose of this paper is to study the thermal warpage of a plastic ball grid array (PBGA) mounted on a printed circuit board (PCB) during the reflow process.

A thermal-mechanical coupling method that used finite-element method software (ANSYS 13.1) was performed. Meanwhile, a shadow moiré apparatus (TherMoiré PS200) combined with a heating platform was used for the experimental measurement of the warpage of PBGA according to the JEDEC Standard.

The authors found that the temperature profiles taken from the simulated results and experimental measurement are consistent with each other, only with a little and acceptable difference in the maximum temperatures. Furthermore, the maximum warpage measurements during the reflow process are 0.157 mm and 0.149 mm for simulation and experimental measurements, respectively, with a small 5.37 per cent difference. The experimental measurement and simulated results are well correlated. Based on the validated finite element model, two factors, namely, the thickness and dimension of PCB, are explored about their effect on the thermal warpage of PBGA mounted on PCB during the reflow process.

The paper provides a thorough parametrical study of the thermal warpage of PBGA mounted on PCB during the reflow process.

The findings in this paper illustrate methods of warpage study by combination of thermal-mechanical finite element simulation and experimental measurement, which can provide good guidelines of the PCB design in the perspective of thermal warpage during the reflow process.

Anisotropic conductive film (ACF) offers miniaturization of package size, reduction in interconnection distance and high performance, cost‐competitive packaging and improved environmental impact. However, a major limitation for ACF is the instability caused by thermal warpage. The purpose of this paper is to study the effects of thermal warpage on contact resistance in real time i.e. make online measurements of contact resistance fluctuations while the assembly undergoes thermal shock.

The ACF assemblies are subjected to thermal cycling with different temperature profiles that have peak temperatures either below or above the glass transition temperature (T_g) of the ACF. The flex substrate used was made of polyimide film, with Au/Ni/Cu electrodes and a daisy‐chained circuit matched to the die bump pattern. The ACF used was based on epoxy resin in which nickel and gold‐coated polymer particles are dispersed. A comparative study was carried out on the results obtained.

The results showed that the glass transition temperature (T_g) of the ACF material plays an important role in the high temperature contact resistance. Above T_g, the ACF matrix becomes less viscous, which reduces its adhesive strength and allows the bumps on the chip to slide away from the pads on the substrate. Even though a flex substrate was used in this study, the sliding effect is severe at the corner bumps of the chip, where cumulative forces are generated due to the thermal expansion mismatch. For every thermal cycling profile, there is an incubation period encountered from this work that would have a significant impact in the application of ACF. After the incubation period the contact resistance increased rapidly and the assemblies were therefore no longer reliable.

The work in this paper focuses on contact resistance changes during thermal shock. The paper discusses the reliability issue of ACF during thermal warpage, which is useful to industries using ACF for flip‐chip assemblies.

This paper aims to develop an estimation tool for warpage behavior of slim printed circuit board (PCB) array while soldering with electronic components by using finite element method. One of the essential requirements for handheld devices, such as smart phone, digital camera, and Note-PC, is the slim design to satisfy the customers’ desires. Accordingly, the printed circuit board (PCB) should be also thinner for a slim appearance, which would result in decreasing the PCB’s bending stiffness. This means that PCB deforms severely during the reflow (soldering) process where the peak temperature goes up to 250°C. Therefore, it is important to estimate PCB deformation at a high temperature for thermo-mechanical quality/reliability after reflow process.

A numerical simulation technique was devised and customized to accurately estimate the behavior of a thin printed board assembly (PBA) during reflow by considering all components, including PCB, microelectronic packages and solder interconnects.

By applying appropriate constraints and boundary conditions, it was found that PBA’s warpage can be accurately predicted during the reflow process. The results were also validated by warpage measurement, which showed a fairly good agreement with one and another.

For research limitations, there are many assumptions regarding numerical modeling. That is, the viscoplastic material property of solder ball is ignored, the reflow profile is simplified and the accurate heat capacity is not considered. Furthermore, the residual stress within the PCB, generated at PCB manufacturing process, is not included in this paper.

This paper shows how to calculate PBA warpage during the reflow process as accurately as possible. This methodology helps a PCB designer and surface-mount technology (SMT) process manager to predict a PBA warpage issue and modify PCB design before PCB real fabrication. Practically, this modeling and simulation process can be easily performed by using a graphical user interface (GUI) module, so that the engineer can handle an issue by inputting some numbers and clicking some buttons.

In a common sense manner, a numerical simulation method can decrease time and cost in manufacturing real samples. This PCB warpage method can also decrease product development duration and produce a new product earlier. Furthermore, PCB is a common component in all the electronic devices. So, this PCB warpage method can have various applications.

Because of an economic advantage, the development of a numerical simulation tool for estimating the thin PBA warpage behaviour during reflow process was attempted. The developed tool contains the features of detailed modeling for electronic components and contact boundary conditions of the supporting rails in the reflow oven.

This study aims to simulate molded printed circuit board (PCB) warpage behavior under reflow temperature distribution. Simulation models are used to estimate dynamic warpage behavior for different form factor sizes.

This study analyzes warpage during the reflow process. The shadow moiré experiment methodology is used to collect data on the dynamic warpage performance of a model with a form factor of 10mm × 10mm × 1mm. The temperature profile with heating from 25°C to 300°C at intervals of 50°C is used, and the sample is made to undergo a cooling process until it reaches the room temperature. Subsequently, ANSYS static structural simulation is performed on similar form factor models to ascertain the accuracy of the simulation results.

Results show that the deformation and total force induced by coefficient of thermal expansion (CTE) mismatch are examined based on the warpage performance of models with different sizes, that is, 45mm × 45mm × 1mm and 45mm × 15mm × 1mm. Compared with the experimental data, the simulated modeling accuracy yields a less than 5% deviation in the dynamic warpage prediction at a reflow temperature of 300°C. Results also reveal that the larger the model, the larger the warpage changes under the reflow temperature.

The simulated warpage is limited to the temperature and force induced by CTE mismatch between two materials. The form factor of the ball-grid array model is limited to only three different sizes. The model is assumed to be steady, isothermal and static. The simulation adopts homogenous materials, as it cannot accurately model nonhomogeneous multilayered composite materials.

This study can provide engineers and researchers with a profound understanding of molded PCB warpage, minimal resource utilization and the improved product development process.

The accurate prediction of molded PCB warpage can enable efficient product development and reduce resources and production time, thereby creating a sustainable environment.

The literature review points out that warpage in various types of PCBs was successfully examined, and that considerable efforts were exerted to investigate warpage reduction in PCB modules. However, PCB warpage studies are limited to bare PCBs. To the best of the authors’ knowledge, the examination of warpage in a molded PCB designed with a molded compound cover, as depicted in Figure 3, is yet to be conducted. A molded compound provides strong lattice support for PCBs to prevent deformation during the reflow process, which is a topic of considerable interest and should be explored.

In the electronic assembly industry, low-temperature soldering holds great potential to be used in surface mounting technology. Tin–bismuth (Sn–Bi) eutectic alloys are lead-free solders applied in consumer electronics because of their low melting point, high strength and low cost. This paper aims to investigate how to address the problem of hot tear crack formation during Sn–Bi low-temperature solder (LTS) in the mass production of consumer electronics.

This paper explored the development of hot tear cracks during Sn–Bi soldering in the fabrication of flip chip ball grid arrays. Experiments were designed to simulate various conditions encountered in Sn–Bi soldering. Quantitative analysis was conducted on the number of hot tear cracks observed in different alloy compositions and solder volumes to explore the primary cause of hot tear cracks and possible methods to suppress crack formation.

Hot tear cracks existed in Sn–Bi solders with different bismuth (Bi) contents, but increasing the solder volume reduced the number of hot tear cracks. Experiments were designed to test the degree of chip transient thermal warpage with temperature change, and, according to the results, glue was dispensed in specific areas to reduce chip warpage deformation. Finally, the results of combined process experiments pointed to an effective method of low-temperature soldering to suppress hot tear cracks.

The study focuses on Sn–Bi solders only without other solder pastes such as SAC305 or Sn–Zn series.

With the growing popularity of smart electronics, especially in intelligent terminals, new energy vehicles electronics, solar photovoltaic and other field, there will be more and more demand for low- temperature, energy-saving, lead-free solders. Therefore, this study will help the industry to roll out LTS (Sn–Bi) solutions rapidly.

In the long term, lean and green manufacturing is expected to be essential for maintaining an advanced manufacturing industry across the world. Developing new LTSs and soldering processes is the most effective, direct solution for energy conservation and emission mitigation. With the growing popularity of smart electronics, especially in intelligent terminals, new energy vehicles and solar photovoltaics, there would be an increased demand for low-temperature, energy-saving, lead-free techniques.

Although there are many methods that can be used to suppress hot tear cracks, there is little research on how to control the hot tear cracks caused by the low-temperature soldering of Sn–Bi in laptop applications. The authors studied the hot tear cracks that developed during the world’s first mass production of 50 million personal laptops based on low-temperature Sn–Bi alloy solder pastes. By controlling the Bi content, redesigning the solder paste printing process (e.g. through a printer’s stencil) and adding dispensing processes, the authors obtained reliable and stable experimental data and conclusions.

The paper aims to deal with a tuning method to reduce warpage of microelectronic substrates.

There are three major processes involved in this method: calculating effective thermomechanical properties of substrates with simple regular electric artworks using 3D finite element (FE) analyses; fitting simplified expressions to the results from the FE analyses; and developing 2D FE models of substrates with arbitrarily complicated artwork using the simplified expressions. These three processes were used to estimate the warpage. An optimization procedure through iterative searches was used to obtain optimized trace widths and/or spacing in order to reduce the warpage.

Using a printed circuit board design to prove our concept, it was found that the warpage could be significantly reduced by modifying trace widths and/or spacing of the printed circuit board.

The paper focuses on a tuning method to reduce warpage of microelectronic substrates.

The purpose of this paper was to study the combined effect of hygro and thermo-mechanical behavior on a plastic encapsulated micro-electro-mechanical systems (MEMS) package during the reflow process after exposed to a humid environment for a prolonged time. Plastic encapsulated electronic packages absorb moisture when they are subjected to humid ambient conditions.

Thus, a comprehensive stress model is established for a three-axis accelerometer MEMS package, with detailed considerations of fundamentals of mechanics such as heat transfer, moisture diffusion and hygro-thermo-mechanical stress. In this study, the mold compound is considered to be the most critical plastic material in MEMS package. Other plastic components of thin film materials can be disregarded due to their small sizes such as die attach and Bismaleimide Triazine (BT) core, even though they are also susceptible to moisture. Thus, only the moisture-induced properties of mold compound were obtained from the proposed experiments. From the desorption measurement after preconditioning at 85°C/85 per cent relative humidity (RH), the saturated moisture content and diffusivity were obtained by curve fitting the data to Fick’s equation. In addition, a new experimental setup was devised using the digital image correlation system together with a precision weight scale to obtain the coefficient of hygroscopic swelling (CHS) at different temperatures.

The experimental results show that the diffusion coefficient of mold compound material follows Arrhenius equation well. Also, it is shown that the CHS of mold compound increases as temperature increases. Experimentally obtained moisture properties were then used to analyze the combined behavior (thermo-hygro-mechanical) of fully saturated MEMS package during the reflow process using a finite element analysis (FEA) with the classical analogy method. Finally, the warpage and stresses inside the MEMS package were analyzed to compare the effects of hygroscopic, thermal and hygro-thermo-mechancal behaviors.

In this study, unlike the other researches, the moisture effects are investigated specifically for MEMS package which is relatively smaller in scale than conventional electronic packages. Also, as a conjugated situation, MEMS package experiences both humid and temperature during the moisture resistance test. Thus, major objective of this study is to verify stress state inside MEMS package during the reflow process which follows the preconditioning at 85°C/85 per cent RH. To quantify the stresses in the package, accurate information of material properties is experimentally obtained and used to improve modeling accuracy.

Reflow soldering process is an important step of the surface mount technology. The purpose of this paper is to minimize the maximum warpage of shielding frame by controlling reflow soldering control parameters.

Compared with other reflow-related design methods, both time and temperate of each extracted time region are considered. Therefore, the number of design variable is increased. To solve the high-dimensional problem, a surrogate-assisted optimization (SAO) called adaptive Kriging high-dimensional representation model (HDMR) is used.

Therefore, the number of design variable is increased. To solve the high-dimensional problem, a surrogate-assisted optimization (SAO) called HDMR is used. The warpage of shield frame is significantly reduced. Moreover, the correlations of design variables are also disclosed.

Compared with the original Kriging HDMR, the expected improvement (EI) criterion is used and a new projection strategy is suggested to improve the efficiency of optimization method. The application suggests that the adaptive Kriging HDMR has potential capability to solve such complicated engineering problems.

The purpose of the present study was to review the thermo-mechanical challenges of reflowed lead-free solder joints in surface mount components (SMCs). The topics of the review include challenges in modelling of the reflow soldering process, optimization and the future challenges in the reflow soldering process. Besides, the numerical approach of lead-free solder reliability is also discussed.

Lead-free reflow soldering is one of the most significant processes in the development of surface mount technology, especially toward the miniaturization of the advanced SMCs package. The challenges lead to more complex thermal responses when the PCB assembly passes through the reflow oven. The virtual modelling tools facilitate the modelling and simulation of the lead-free reflow process, which provide more data and clear visualization on the particular process.

With the growing trend of computer power and software capability, the multidisciplinary simulation, such as the temperature and thermal stress of lead-free SMCs, under the influenced of a specific process atmosphere can be provided. A simulation modelling technique for the thermal response and flow field prediction of a reflow process is cost-effective and has greatly helped the engineer to eliminate guesswork. Besides, simulated-based optimization methods of the reflow process have gained popularity because of them being economical and have reduced time-consumption, and these provide more information compared to the experimental hardware. The advantages and disadvantages of the simulation modelling in the reflow soldering process are also briefly discussed.

This literature review provides the engineers and researchers with a profound understanding of the thermo-mechanical challenges of reflowed lead-free solder joints in SMCs and the challenges of simulation modelling in the reflow process.

The unique challenges in solder joint reliability, and direction of future research in reflow process were identified to clarify the solutions to solve lead-free reliability issues in the electronics manufacturing industry.

In this paper, analytical modelling of heat distribution along the thickness of different printed circuit board (PCB) substrates is presented according to the 1 D heat transient conduction problem. This paper aims to reveal differences between the substrates and the geometry configurations and elaborate on further application of explicit modelling.

Different substrates were considered: classic FR4 and polyimide, ceramics (BeO, Al₂O₃) and novel biodegradables (polylactic-acid [PLA] and cellulose acetate [CA]). The board thicknesses were given in 0.25 mm steps. Results are calculated for heat transfer coefficients of convection and vapour phase (condensation) soldering. Even heat transfer is assumed on both PCB sides.

It was found that temperature distributions along PCB thicknesses are mostly negligible from solder joint formation aspects, and most of the materials can be used in explicit reflow profile modelling. However PLA shows significant temperature differences, pointing to possible modelling imprecisions. It was also shown, that while the difference between midplane and surface temperatures mainly depend on thermal diffusivity, the time to reach solder alloy melting point on the surface depends on volumetric heat capacity.

Results validate the applicability of explicit heat transfer modelling of PCBs during reflow for different heat transfer methods. The results can be incorporated into more complex simulations and profile predicting algorithms for industrial ovens controlled in the wake of Industry 4.0 directives for better temperature control and ultimately higher soldering quality.