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The wearout characteristics were investigated for soldered interconnections of surface mount technology (SMT) chip resistors, chip capacitors and a 44 I/O ceramic leaded chip carrier (CLCC) package. Four double‐sided test vehicles were subjected to accelerated thermal cycling in the — 10°C to + 110°C range; 30°C/min ramp rate; and 1 minute dwell time at each temperature extreme. The test was interrupted at initially 500 cycle and later at 1000 cycle intervals to perform visual inspection of all soldered interconnections, functional performance verification for the test vehicles, and resistance measurement on leaded SMT joints. Metallographic examinations and fractographic studies were also performed after 0, 4500 and 13000 cycles to characterise the micromechanisms of soldered joint strength degradation and failure. The wearout thresholds for soldered joints of chip resistors and capacitors on side 1 were respectively 2500 and 4500 cycles. The greater thermal fatigue resistance of the latter joints was attributed to a lower device‐substrate coefficient of thermal expansion (CTE) mismatch and a more favourable device geometry compared with chip resistors. These passive components on side 2, however, showed a virtually identical soldered joint wearout threshold of 6500 cycles. The constraints imposed by the applied mounting adhesive were primarily responsible for this behaviour. No correlation appeared to exist among various failure criteria used to determine the onset of failure for leaded SMT soldered connections. The concurrent monitoring of electrical resistance and the applied tensile load showed a modest relationship between the load drop and resistance increase, however. The test vehicles continued to pass the functional performance verification, even after 13000 thermal cycles. Nonetheless, the joint wearout thresholds were considered to be 2500, 4500 and 4500 cycles for chip resistor, chip capacitor and CLCC components, respectively. A 50% soldered joint strength drop was considered as the wearout threshold for the CLCC device. Metallographic examination showed limited barrel wall cracking of the vias and no evidence of cracks with the through‐hole soldered joints, even after 13000 thermal cycles.

This paper aims to perform thermal and mechanical characterization for silver-based sintered thermal joints. Layer quality affects thermal and mechanical performance, and it is important to achieve information about how materials and process parameters influence them.

Thermal investigation of the thermal joints analysis method was focused on determination of thermal resistance, where temperature measurements were performed using infrared camera. They were performed in two modes: steady-state analysis and dynamic analysis. Mechanical analysis based on measurements of mechanical shear force. Additional characterizations based on X-ray image analysis (image thresholding), optical microscope of polished cross-section and scanning electron microscope image analysis were proposed.

Sample surface modification affects thermal resistance. Silver metallization exhibits the lowest thermal resistance and the highest mechanical strength compared to the pure Si surface. The type of dynamic analysis affects the results of the thermal resistance.

Investigation of the layer quality influence on mechanical and thermal performance provided information about different joint types.

An installation has been developed for carrying out thermal cycling experiments on soldered SMT joints. Using this thermal cycle installation (which was developed by the authors) and a simulated chip carrier, study has been made of the influence of various factors on the reliability of soldered SMT joints during thermal cycling. These factors include the position of the soldered joint, the temperature range of the thermal cycle, the dwell time, etc.

This paper aims to develop thermal analysis method of thermal joints characterization. The impact on convection on thermal resistance analysis with use thermography for silver-based thermal joints were investigated for non-metallized and metalized semiconductor surfaces. Heat transfer efficiency depends on thermal conductivity; radiation was used to perform thermographic analysis; the convection is energy loss, so its removing might improve measurements accuracy.

Investigation of thermal joints analysis method was focused on determination of convection impact on thermal resistance thermographic analysis method. Measuring samples placed in vacuum chamber with lowered pressure requires transparent window for infrared radiation that is used for thermographic analysis. Impact of infrared window and convection on temperature measurements and thermal resistance were referred.

The results showed that the silicon window allowed to perform thermal analysis through, and the convection was heat transfer mode which create 15% energy loss.

It is possible to measure thermal resistance for silver-based thermal joints with convection eliminated to improve measurements accuracy.

The effect of gold (Au) on the reliability of 0.65 mm pitch surface mount solder joints between plastic quad flat packs and Cu‐Ni‐Au FR‐4 printed circuit boards was investigated. Cu‐Ni‐Au is a desirable printed circuit board finish for multi‐chip modules or printed circuit boards that would otherwise require a selective Au finish, for example for edge connectors or wire bondable parts. However, Au is known to embrittle solder when it is present in sufficiently high concentrations, creating a concern that solder joint fatigue life in service will also be adversely affected. This paper reports the results of mechanical shock, mechanical vibration and thermal cycling testing of fine pitch solder joints containing varying amounts of Au. Tests were performed on as‐soldered joints and on joints that had been heat‐treated to evolve the microstructure towards equilibrium. The tests were designed to accelerate in‐service conditions in a typical industrial environment. Under these conditions, the Au concentrations tested did not promote solder joint failures. Microstructural characterisation of the distribution and morphology of the Au‐, Ni‐ and Cu‐Sn intermetallics in the joint before and after accelerated testing was also performed. On the basis of these observations it is recommended that the Au concentration in solder joints between plastic quad flat packs and Cu‐Ni‐Au FR‐4 printed circuit boards not exceed 3.0 wt.%.

The lead‐free solder joint reliability of several printed circuit board mounted high‐density packages, when subjected to temperature cycling was investigated by finite element modelling. The packages were a 256‐pin plastic ball grid array (PBGA), a 388‐pin PBGA, and a 1657‐pin ceramic column grid array. Emphasis was placed on the determination of the creep responses (e.g. stress, strain, and strain energy density) of the lead‐free solder joints of these packages.

The problem of concurrent thermal and vibration loading has not been thoroughly studied even though it is common in electronic packaging applications. Here we attempt to address such a problem using a damage mechanics based constitutive model. Damage mechanics constitutive model for eutectic Pb/Sn solder alloys is used to simulate the damage effects of concurrent cyclic thermal loads and vibrations on Ball Grid Array (BGA) packages. The model is implemented into the commercial finite element code ABAQUS through its user defined material subroutine capability. For the integration algorithm we have used a return mapping scheme, which dramatically improves the convergency rate as compared to previous implementations of the same model. Results are examined in terms of accumulation of plastic strain within the solder connections. It is shown that the simplistic Miner’s rule can not accurately account for the combined effect of both loadings acting concurrently.

This paper aims to find proper technological parameters of low-temperature joining technique by silver sintering to eventually use this technique for reliable electronic packaging.

Based on the literature and author’s own experience, the factors influencing the nanosized Ag particle sintering results were identified, and their significance was assessed.

It has been shown that some important technological parameters clearly influence the quality of the joints, and their choice is unambiguous, but the meaning of some parameters is dependent on other factors (interactions), and they should be selected experimentally.

The value of this research is that the importance of all technological factors was analyzed, which makes it easy to choose the technological procedures in the electronic packaging.

This paper seeks to review recent advances in wire bonding, flip chip and lead‐free solder for advanced microelectronics packaging.

Of the 91 journal papers, 59 were published in 2005‐2007 and topics related to wire bonding, flip chip and lead‐free solder for advanced microelectronics packaging are reviewed.

Research on advanced wire bonding is continuously performed for advanced and complex applications such as stacked‐dies wire bonding, wire bonding of low‐k ultra‐fine‐pitch devices, and copper wire bonding. Owing to its many advantages, flip chip using adhesive has gained more popularity. Research on the reliability of lead‐free solder joints is being conducted world‐wide. The new challenges, solutions and new developments are discussed in this paper.

Because of page limitation of this review paper and the large number of the journal papers available, only a brief review is conducted. Further reading is needed for more details.

This review paper attempts to provide introduction to recent developments and the trends in terms of the topics for advanced microelectronics packaging. With the references provided, readers may explore more deeply, focusing on a particular issue.

The purpose of this study is to investigate the effect of aging temperature on the barrel-type solder joint lifetime of electronic devices and to include these effects in the modified prediction model.

Several accelerated shear stress tests under different stress amplitudes and aging temperatures were performed.

It was found that by aging temperature increasing, the lifetime decreases. Morrow energy model was also found as the best prediction model when the aging temperature is taken into consideration.

It is confirmed.