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Environmental concerns over hazardous materials being placed in landfills have caused many countries to enact legislation to limit and/or eliminate the use of lead in…
Environmental concerns over hazardous materials being placed in landfills have caused many countries to enact legislation to limit and/or eliminate the use of lead in electronic devices. As a result, the electronics manufacturing industry has undertaken efforts to comply with the legislation. Solder paste is typically used as the joining material between boards and components. The standard solder paste alloy has traditionally been a tin/lead eutectic. Lead‐free should, in theory, have the same functionality as the standard pastes to be utilized as a drop‐in replacement. Typically, solder paste is deposited on to a land pattern site by a stencil printer. In the manufacturing environment, speed and accuracy are desirable characteristics of the stencil printing operation. The purpose of this paper is to determine how fast a selection of lead‐free pastes can be successfully printed.
A representative sample of four lead‐free solder pastes containing different alloys was selected. A series of experiments at an increasing print speed was used to deposit these solder pastes on to printed circuit boards and the printed solder volumes were measured. The maximum print speed for each paste was observed and noted for future use.
Of the four alloys selected for experimentation, one emerged to have the most superior performance in terms of high‐speed printability. The speeds for each paste were observed and noted for future use.
Experimentation was performed in an electronics service provider's environment using equipment and materials that were normally used in production.
The parameters obtained can be used on the manufacturing floor assembling lead‐free products.
The results offer a suggestion (in the form of the parameters that can be utilized) as to what parameters to use in the stencil printing of lead‐free solder paste at high speeds.
The paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters…
The paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on the printing performance. As the current product miniaturisation trend continues, area array type package solutions are now being designed into products. The assembly of these devices requires the printing of very small solder paste deposits. The printing of solder pastes through small stencil apertures typically results in stencil clogging and incomplete transfer of paste to the PCB pads. At the very narrow aperture sizes required for flip‐chip applications, the paste rheology becomes crucial for consistent paste withdrawal. This is because, for smaller paste volumes, surface tension effects become dominant over viscous flow. Proper understanding of the effect of the key material, equipment and process parameters, and their interactions, is crucial for achieving high print yields. During the aperture filling and emptying sub‐process, the solder paste experiences forces/stresses as it interacts with the stencil aperture walls and the pad surfaces, which directly impact the paste flow within the apertures. As the substrate and stencil separate, the frictional/adhesive force on the stencil walls competes directly with the adhesives/pull force on the PCB pads, often resulting in incomplete paste transfer or skipping/clogged apertures. In this paper, we investigate the effect of stencil design on the printing process and in particular the effect on paste transfer efficiency.
Surface Mount Technology relies on the use of screen or stencil printers for solder paste application. Many systems now incorporate complex vision systems to provide improved accuracy during printing. These systems advertise sub‐mil precision (x1|+3o<0·001 in.) but none provides a method to quantify this precision. With the advent of fine pitch pads [pad pitch ≤0·025 in.), accurate characterisation of the printing machine's capabilities is imperative for a successful manufacturing process. This paper will present a quantitative method with supporting experimental data, for analysing the printing capabilities of the stencilling machine.
In a production environment, the first process applied to a bare printed circuit board is generally the application of solder paste. It has been reported that 60% of all rework is attributable to poor quality solder paste deposition. If this process is not understood or the incorrect selection of paste, screen/stencil or squeegee is used, then regardless of technical capabilities of the printer, it will not be possible to achieve accurate and repeatable quality of work. This paper reports on the basics of solder paste deposition with mathematical formulas and diagrams to support the correct selection of criteria. Most importantly, it is intended to assist in the selection process and provide an understanding of the reasons for selecting a specific solder/stencil/squeegee to be used in conjunction with the printer. Written and compiled from a production (real world) view‐point, this paper recognises that it is certainly possible to use a non‐standard process parameter, and still achieve ultra‐fine pitch print capability in laboratory or small batch scenario. But primarily this paper is a guidance and recommendation to achieve excellent results, with as large a process window as is possible for production purposes.
Most solder paste printers are configured to periodically clean the stencil to maintain printing quality. However, a periodical cleaning control may result in excessive…
Most solder paste printers are configured to periodically clean the stencil to maintain printing quality. However, a periodical cleaning control may result in excessive cleaning operations. The purpose of this paper is to develop a control method to schedule stencil cleaning operations appropriately.
A hybrid failure rate model of the stencil printing process with age reduction factor and failure rate increase factor is presented. A stencil cleaning policy based on system reliability is introduced. An optimization model used to derive the optimal stencil cleaning schedule is provided.
An aperiodic stencil cleaning control with good adaptability is achieved. A comparative analysis indicates that aperiodic control has better printing system reliability than traditional periodical control under the same cleaning resource consumption.
Periodical cleaning control commonly used in industrial printing process often results in excessive cleaning operations. By incorporating the printing system reliability, this paper develops an aperiodic stencil cleaning control method based on hybrid failure rate model of the stencil printing process. It helps to reduce unnecessary cleaning operations while keeping printing quality stable.