Search results

Au stud bump bonding technology is an effective means to realize heterogeneous integration of commercial chips in the 2.5D electronic packaging. The purpose of this paper is to study the long-term reliability of the Au stud bump treated by four different high temperature storage times (200°C for 0, 100, 200 and 300 h).

The bonding strength and the fracture behavior are investigated by chip shear test. The experiment is further studied by microstructural characterization approaches such as scanning electron microscope, energy dispersive spectrometer and so on.

It is recognized that there were mainly three typical fracture models during the chip shear test among all the Au stud bump samples treated by high temperature storage. For solder bump before aging, the fracture occurred at the interface between the Cu pad and the Au stud bump. As the aging time increased, the fracture mainly occurred inside the Au stud bump at 200°C for 100 and 200 h. When aging time increased to 300 h, it is found that the fracture transferred to the interface between the Au stud bump and the Al Pad.

In addition, the bonding strength also changed with the high temperature storage time increasing. The bonding strength does not change linearly with the high temperature storage time increasing but decreases first and then increases. The investigation shows that the formation of the intermetallic compounds because of the reaction between the Au and Al atoms plays a key role on the bonding strength and fracture behavior variation.

The purpose of this study is to propose a simplifying approach for modelling a reliability test. Modelling the reliability tests of printed circuit board (PCB)/microelectronic component assemblies requires the adoption of several simplifying assumptions. This study introduces and validates simplified assumptions for modeling a four-point bend test on a PCB/wafer-level chip scale packaging assembly.

In this study, simplifying assumptions were used. These involved substituting dynamic imposed displacement loading with an equivalent static loading, replacing the spherical shape of the interconnections with simplified shapes (cylindrical and cubic) and transitioning from a three-dimensional modelling approach to an equivalent two-dimensional model. The validity of these simplifications was confirmed through both quantitative and qualitative comparisons of the numerical results obtained. The maximum principal plastic strain in the solder balls and copper pads served as the criteria for comparison.

The simplified hypotheses were validated through quantitative and qualitative comparisons of the results from various models. Consequently, it was determined that the replacement of dynamic loading with equivalent static loading had no significant impact on the results. Similarly, substituting the spherical shape of interconnections with an equivalent shape and transitioning from a three-dimensional approach to a two-dimensional one did not substantially affect the precision of the obtained results.

This study serves as a valuable resource for researchers seeking to model accelerated reliability tests, particularly in the context of four-point bending tests. The results obtained in this study will assist other researchers in streamlining their numerical models, thereby reducing calculation costs through the utilization of the simplified hypotheses introduced and validated herein.

Due to the miniaturization of electronic devices, the increased current density through solder joints leads to the occurrence of electromigration failure, thereby reducing the reliability of electronic devices. The purpose of this study is to propose a finite element-artificial neural network method for the prediction of temperature and current density of solder joints, and thus provide reference information for the reliability evaluation of solder joints.

The temperature distribution and current density distribution of the interconnect structure of electronic devices were investigated through finite element simulations. During the experimental process, the actual temperature of the solder joints was measured and was used to optimize the finite element model. A large amount of simulation data was obtained to analyze the neural network by varying the height of solder joints, the diameter of solder pads and the magnitude of current loads. The constructed neural network was trained, tested and optimized using this data.

Based on the finite element simulation results, the current is more concentrated in the corners of the solder joints, generating a significant amount of Joule heating, which leads to localized temperature rise. The constructed neural network is trained, tested and optimized using the simulation results. The ANN 1, used for predicting solder joint temperature, achieves a prediction accuracy of 96.9%, while the ANN 2, used for predicting solder joint current density, achieves a prediction accuracy of 93.4%.

The proposed method can effectively improve the estimation efficiency of temperature and current density in the packaging structure. This method prevails in the field of packaging, and other factors that affect the thermal, mechanical and electrical properties of the packaging structure can be introduced into the model.

This paper aims to study the relationship between the ball grid array (BGA) flip-chip underfilling process parameter and its void formation region.

A set of top-down scanning acoustic microscope images of BGA underfill is collected and void labelled. The labelled images are trained with a convolutional neural network model, and the performance is evaluated. The model is tested with new images, and the void area with its region is analysed with its dispensing parameter.

All findings were well-validated with reference to the past experimental results regarding dispensing parameters and their quantitative regional formation. As the BGA is non-uniform, 85% of the test samples have void(s) formed in the emptier region. Furthermore, the highest rating factor, valve dispensing pressure with a Gini index of 0.219 and U-type dispensing pattern set of parameters generally form a lower void percentage within the underfilling, although its consistency is difficult to maintain.

This study enabled manufacturers to forecast the void regional formation from its filling parameters and array pattern. The filling pressure, dispensing pattern and BGA relations could provide qualitative insights to understand the void formation region in a flip-chip, enabling the prompt to formulate countermeasures to optimise voiding in a specific area in the underfill.

The void regional formation in a flip-chip underfilling process can be explained quantitatively with indicative parameters such as valve pressure, dispensing pattern and BGA arrangement.

The purpose of the present work is to study the impacts of rapid cooling and Tb rare-earth additions on the structural, thermal and mechanical behavior of Bi–0.5Ag lead-free solder for high-temperature applications.

Effect of rapid solidification processing on structural, thermal and mechanical properties of Bi-Ag lead-free solder reinforced Tb rare-earth element.

The obtained results indicated that the microstructure consists of rhombohedral Bi-rich phase and Ag99.5Bi0.5 intermetallic compound (IMC). The addition of Tb could effectively reduce the onset and melting point. The elastic modulus of Tb-containing solders was enhanced to about 90% at 0.5 Tb. The higher elastic modulus may be attributed to solid solution strengthening effect, solubility extension, microstructure refinement and precipitation hardening of uniform distribution Ag99.5Bi0.5 IMC particles which can reasonably modify the microstructure, as well as inhibit the segregation and hinder the motion of dislocations.

It is recommended that the lead-free Bi-0.5Ag-0.5Tb solder be a candidate instead of common solder alloy (Sn-37Pb) for high temperature and high performance applications.