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1 – 10 of 257
Article
Publication date: 16 August 2013

Yuanming Chen, Wei He, Guoyun Zhou, Zhihua Tao, Yang Wang and Daojun Luo

Pb‐free soldering challenged printed circuit board (PCB) assembly with high temperature. The purpose of this paper is to explain the failure mechanism of printed circuit board…

Abstract

Purpose

Pb‐free soldering challenged printed circuit board (PCB) assembly with high temperature. The purpose of this paper is to explain the failure mechanism of printed circuit board (PCB) assembly with solder bubbles of vias to avoid the problems of via‐drilling defects and solder joint failure.

Design/methodology/approach

The failure of PCB vias with solder bubbles was investigated through cross sections and SEM microstructure inspection, TMA measurement, moisture absorption analysis and DSC measurement. The moisture absorption and CTE of FR4 laminate matched with manufacturing requirement to avoid the effects of solder bubbles. The effects of via drilling with a dull drill bit were compared to that with a new drill bit.

Findings

The moisture absorbed inside holes of via plating layers could be exposed to induce solder bubbles during Pb‐free soldering assembly and dull drill bits should be prevented during the drilling process to avoid the no‐bearing drilling effects.

Originality/value

The failure of PCB vias is not only involved in the voiding in solder joints but manufacturing processes of PCB. The paper designs an approach to analyse the properties of PCB materials and the drilling effects of vias to find out the mechanism resulting in solder bubbles of vias. The problem of drill bits should be considered to prevent the moisture absorbed in drilling vias with defects.

Details

Circuit World, vol. 39 no. 3
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 23 November 2018

Lijuan Huang, Zhenghu Zhu, Hiarui Wu and Xu Long

Vapor phase soldering (VPS), also known as condense soldering, is capable of improving the mechanical reliability of solder joints in electronic packaging structures. The paper…

Abstract

Purpose

Vapor phase soldering (VPS), also known as condense soldering, is capable of improving the mechanical reliability of solder joints in electronic packaging structures. The paper aims to discuss this issue.

Design/methodology/approach

In the present study, VPS is utilized to assemble two typical packaging types (i.e. ceramic column grid array (CCGA) and BGA) for electronic devices with lead-containing and lead-free solders. By applying the peak soldering temperatures of 215°C and 235°C with and without vacuum condition, the void formation and intermetallic compound (IMC) thickness are compared for different packaging structures with lead-containing and lead-free solder alloys.

Findings

It is found that at the soldering temperature of 215°C, CCGA under a vacuum condition has fewer voids but BGA without vacuum environment has fewer voids despite of the existence of lead in solder alloy. In light of contradictory phenomenon about void formation at 215°C, a similar CCGA device is soldered via VPS at the temperature of 235°C. Compared with the size of voids formed at 215°C, no obvious void is found for CCGA with vacuum at the soldering temperature of 235°C. No matter what soldering temperature and vacuum condition are applied, the IMC thickness of CCGA and BGA can satisfy the requirement of 1.0–3.0 µm. Therefore, it can be concluded that the soldering temperature of 235°C in vacuum is the optimal VPS condition for void elimination. In addition, shear tests at the rate of 10 mm/min are performed to examine the load resistance and potential failure mode. In terms of failure mode observed in shear tests, interfacial shear failure occurs between PCB and bulk solder and also within bulk solder for CCGA soldered at temperatures of 215°C and 235°C. This means that an acceptable thicker IMC thickness between CCGA solder and device provides greater interfacial strength between CCGA and device.

Originality/value

Due to its high I/O capacity and satisfactory reliability in electrical and thermal performance, CCGA electronic devices have been widely adopted in the military and aerospace fields. In the present study, the authors utilized VPS to assemble a typical type of CCGA with the control package of conventional BGA to investigate the relation between essential condition (i.e. soldering temperature and vacuum) to void formation.

Details

Multidiscipline Modeling in Materials and Structures, vol. 15 no. 2
Type: Research Article
ISSN: 1573-6105

Keywords

Article
Publication date: 1 April 1992

J.J. Davignon and F. Gray

The tenting of via holes has been a controversial issue in the military arena for several years. This issue has gained importance with MIL‐STD‐2000's requirement that all…

Abstract

The tenting of via holes has been a controversial issue in the military arena for several years. This issue has gained importance with MIL‐STD‐2000's requirement that all circuitry and vias under components be coated to preclude entrapment of flux. This paper addresses this issue by evaluating the MIL‐Spec thermal shock reliability of solder mask as a hole fill material and as a via tent cover. The relationship of via hole to pad size on tent reliability and solder mask thickness is also investigated. This paper concludes that solder mask as a hole fill material will not pass military thermal shock requirements and that standard dry film solder mask is very sensitive to via hole and pad dimensions. The thinner and more flexible high conformance solder mask is the only material capable of passing MIL‐Spec thermal shock requirements for all via hole to pad relationships.

Details

Circuit World, vol. 19 no. 1
Type: Research Article
ISSN: 0305-6120

Article
Publication date: 1 January 1993

W.B. Hance and N.C. Lee

The mechanisms for void formation are investigated for applications involving solder paste in surface mount technology. Generally, voids are caused by the outgassing of entrapped…

Abstract

The mechanisms for void formation are investigated for applications involving solder paste in surface mount technology. Generally, voids are caused by the outgassing of entrapped flux in the sandwiched solder during reflow. The voiding is dictated mainly by the solderability of metallisation, and increases with decreasing solderability of metallisation, decreasing flux activity, increasing metal load of powder, and increasing coverage area under the lead of the joint. Decrease in the solder powder particle size has only a slightly negative effect on voiding. The data indicate that voiding is also a function of the timing between the coalescing of solder powder and the elimination of immobile metallisation oxide. The sooner the paste coalescence occurs, the worse the voiding will be. Increase in voiding is usually accompanied by an increasing fraction of large voids, suggesting that factors causing voiding will have an even greater impact on the joint reliability than shown by the total‐ void‐volume analysis results. Preliminary data suggest that certain predry treatment and flux solvent with higher boiling point appear to cause increased voiding.

Details

Soldering & Surface Mount Technology, vol. 5 no. 1
Type: Research Article
ISSN: 0954-0911

Article
Publication date: 1 March 1995

W.B. O'Hara and N.‐C. Lee

Voiding in BGA assembly using SN63 solder bumps is primarily introduced at board‐level assembly stage. On the pretinned PCBs, voiding of BGA joints increases with increasing…

Abstract

Voiding in BGA assembly using SN63 solder bumps is primarily introduced at board‐level assembly stage. On the pretinned PCBs, voiding of BGA joints increases with increasing solvent volatility, increasing metal content and increasing reflow temperature, and with decreasing powder size. This can be explained by a viscosity dictated flux‐exclusion‐rate model. In this model, a higher viscosity in the fluxing medium at reflow temperature could hinder the exclusion of flux from the interior of the molten solder, hence increase the chance of outgassing due to the increasing amount of entrapped flux, and consequently result in higher voiding in BGA assembly. Flux activity and reflow atmosphere appear to have a negligible effect on voiding when the solderability of the immobile metallisation is not a concern. An increase in void content is accompanied by an increase in the fraction of large voids. This suggests that, similar to voiding phenomena in the SMT process, factors causing voiding in BGA will have an even greater impact on joint reliability than shown by the total‐void‐volume analysis results.

Details

Soldering & Surface Mount Technology, vol. 7 no. 3
Type: Research Article
ISSN: 0954-0911

Article
Publication date: 1 January 1984

W. Leibfried

This paper outlines some general aspects of materials and processes for reliable soldering of chip components and presents some new results on testing of wettability and leaching…

Abstract

This paper outlines some general aspects of materials and processes for reliable soldering of chip components and presents some new results on testing of wettability and leaching of thick films, thermal fatigue of solders and the reliability of solder joints on different thick film metallisations.

Details

Microelectronics International, vol. 1 no. 4
Type: Research Article
ISSN: 1356-5362

Article
Publication date: 27 October 2021

Yanruoyue Li, Guicui Fu, Bo Wan, Zhaoxi Wu, Xiaojun Yan and Weifang Zhang

The purpose of this study is to investigate the effect of electrical and thermal stresses on the void formation of the Sn3.0Ag0.5Cu (SAC305) lead-free ball grid array (BGA) solder

170

Abstract

Purpose

The purpose of this study is to investigate the effect of electrical and thermal stresses on the void formation of the Sn3.0Ag0.5Cu (SAC305) lead-free ball grid array (BGA) solder joints and to propose a modified mean-time-to-failure (MTTF) equation when joints are subjected to coupling stress.

Design/methodology/approach

The samples of the BGA package were subjected to a migration test at different currents and temperatures. Voltage variation was recorded for analysis. Scanning electron microscope and electron back-scattered diffraction were applied to achieve the micromorphological observations. Additionally, the experimental and simulation results were combined to fit the modified model parameters.

Findings

Voids appeared at the corner of the cathode. The resistance of the daisy chain increased. Two stages of resistance variation were confirmed. The crystal lattice orientation rotated and became consistent and ordered. Electrical and thermal stresses had an impact on the void formation. As the current density and temperature increased, the void increased. The lifetime of the solder joint decreased as the electrical and thermal stresses increased. A modified MTTF model was proposed and its parameters were confirmed by theoretical derivation and test data fitting.

Originality/value

This study focuses on the effects of coupling stress on the void formation of the SAC305 BGA solder joint. The microstructure and macroscopic performance were studied to identify the effects of different stresses with the use of a variety of analytical methods. The modified MTTF model was constructed for application to SAC305 BGA solder joints. It was found suitable for larger current densities and larger influences of Joule heating and for the welding ball structure with current crowding.

Details

Soldering & Surface Mount Technology, vol. 34 no. 3
Type: Research Article
ISSN: 0954-0911

Keywords

Content available
Article
Publication date: 16 August 2013

Martin Goosey

43

Abstract

Details

Circuit World, vol. 39 no. 3
Type: Research Article
ISSN: 0305-6120

Article
Publication date: 1 January 1993

G.W. Hill

As the hybrid market changes, many hybrid companies are being forced to adjust to reduced defence budgets and to the encroachment of epoxy board based SMT on traditional hybrid…

Abstract

As the hybrid market changes, many hybrid companies are being forced to adjust to reduced defence budgets and to the encroachment of epoxy board based SMT on traditional hybrid areas. This paper considers the establishment of an intelligent power module technology as a viable way to utilise the strengths of hybrid technology, in a field where there is an expanding market and, at present, not too much competition. The basic techniques are described, some of the potential pitfalls are highlighted, and the likely scale of technical and personnel investment is indicated.

Details

Microelectronics International, vol. 10 no. 1
Type: Research Article
ISSN: 1356-5362

Article
Publication date: 1 January 1982

C. Val, G. Kersuzan and B. Dreyfus‐Alain

The ‘chip carrier’ or CC is an intermediate support, hermetically sealed or otherwise, (of alumina, beryllium oxide or plastic) requires to connect an integrated circuit chip with…

Abstract

The ‘chip carrier’ or CC is an intermediate support, hermetically sealed or otherwise, (of alumina, beryllium oxide or plastic) requires to connect an integrated circuit chip with numerous output pins to the outside world. This carrier at present represents the best compromise in terms of technology and economy, because of the use of standard multi‐source chips and the simple testing it permits.

Details

Microelectronics International, vol. 1 no. 1
Type: Research Article
ISSN: 1356-5362

1 – 10 of 257