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The purpose of this paper is to investigate the effects of H2 flow rate on improving the solder wettability of oxidized‐copper with liquid lead‐free solder (96.5Sn‐3Ag‐0.5Cu) by Ar‐H2 plasmas. The aim was to improve the solder wettability of oxidized copper from 0 per cent wetting of copper oxidized in air at 260^oC for 1 hour to 100 per cent wetting of oxidized‐copper modified by Ar‐H2 plasmas at certain H2 flow rates and to find correlations between the surface characteristics of copper and the solder wettability with liquid lead‐free solder.

To reduce the copper oxides on the surfaces of oxidized‐copper for improving solder wettability with liquid lead‐free solder, this study attempted to apply Ar‐H2 plasmas to ablate the copper oxides from the surfaces of oxidized‐copper by the physical bombardment of the Ar plasmas and to reduce the surfaces of oxidized‐copper by the chemical reaction of H2 plasmas with the surfaces of oxidized‐copper.

The solder wettability of oxidized‐copper was found to be highly dependent on the surface characteristics of the copper. The values of polar surface free energy and dispersive surface free energy on the surfaces of oxidized‐copper modified by Ar‐H2 plasmas were close to those values of solid lead‐free solder, which resulted in improved solder wettability with liquid lead‐free solder. Auger spectra indicated that the Ar‐H2 plasma modification was used to remove the copper oxides from the surfaces of oxidized‐copper.

The surface characterization of copper surfaces is typically determined by expensive surface analysis tool such as Auger Electron Spectroscopy (AES). This paper reports the results of a study of a promising technique called the sessile drop test method, for examining the surface free energies such as total surface free energy, polar surface free energy and dispersive surface free energy on the surfaces of copper to clarify how the solder wettability of oxidized‐copper with liquid lead‐free solder was enhanced by Ar‐H2 plasmas.

Due to increasing density and high demands on electrical and thermal performance, modern packages require alternative chip interconnection and substrate technologies. Flip‐chip (FC) bonding is a suitable method for high interconnection densities. Compared with wire bonding and TAB, FC provides the highest contact density. This is due to the possibility of using the whole chip surface for bondpads (area bumps). In this paper, an adapted FC technology on green tape ceramic substrates was investigated. In order to reduce the substrate costs, FC bonding was performed directly on the thick film metallisation without the application of thin film technology for the upper substrate layers. Two solder bump metallurgies: PbSn95/5 and Au/Sn solder bumps were applied for fluxless FC bonding on adapted substrate metallisations. Fluxless soldering is performed by single chip bonding and requires substrates with narrow planarity tolerances. An alternative method using a wet eutectic Au/Sn solder paste on the substrate and Au bumps permits the application of substrates with standard planarity tolerances used in thick film applications. A common reflow of all chips of a multichip module is possible. First reliability results of metallurgical analysis and of the mechanical and electrical behaviour of the FC contacts after thermal cycling are presented.

The reliability of 0·5 mm pitch, 208‐pin FQFP solder joints has been studied by experimental temperature cycling and 3‐D nonlinear finite element analysis. Temperature cycling results have been presented as a Weibull distribution. Thermal fatigue life of the solder joints has been estimated based on the calculated plastic strain and isothermal fatigue data on solders. A correlation between the experimental and analytical results has also been made.

This paper reviews the status of lead‐free solder development works. Some of the solder systems — Bi‐Sn, Bi‐Sn‐Fe, ln‐Sn, Sn, Sn‐Ag, Sn‐Ag‐Zn, Sn‐Ag‐Zn‐Cu, Sn‐Bi‐Ag, Sn‐Cu, Sn‐Cu‐Ag, Sn‐In‐Ag, Sn‐Sb, Sn‐Zn and Sn‐Zn‐ln — are discussed in more detail, while others are briefly commented on. In general, compared with eutectic Sn‐Pb solder, all the lead‐free solder alternatives investigated more or less exhibit some shortcomings, such as price, physical, metallurgical or mechanical properties. Relatively, Sn‐ln‐containing systems are more promising in terms of solder mechanical properties and soldering performance, although the price of ln may be a concern. Eutectic Sn‐Ag solder doped with Zn, Cu or Sb exhibits good mechanical strength and creep resistance, due to refined microstructure. The Bi‐Sn systems doped with other elements may have a niche in the low temperature soldering field. Eutectic Sn‐Cu has good potential due to its good fatigue resistance. The eutectic Sn‐Zn system modified with ln and/or Ag may be promising in terms of mechanical properties. Finding a lead‐free alternative for high temperature solders presents the biggest challenge to the industry.

Although rework is labour intensive and conflicts with most modern manufacturing/assembly philosophies, realistic defect levels in surface mount technology (SMT) printed circuit board (PCB) assembly render rework indispensable on the shop floor. Most commercially available rework tools are manual or require very skilled operators for their efficient operation. The challenges of automating SMD rework are significant because the tools, their specifications and rework processes required are not fully understood, and the impact of rework processes on assembly quality and reliability are hotly debated. This paper describes an automated robotic rework cell for SMD and TH boards, and the method used for process characterisation of the solder paste dispensing system. The paper also describes equipment selection, the integration and interfacing of the dispensing equipment to the cell controller and the process characterisation experiments.

In flip‐chip interconnection on organic substrates using eutectic tin/lead solder bumps, a highly reliable under bump metallurgy (UBM) is required to maintain adhesion and solder wettability. Various UBM systems such as 1μm Al/0.2μm Ti/5μm Cu, 1μm Al/02μm Ti/1μm Cu, 1μm Al/0.2μm Ni/1μm Cu and 1μm Al/0.2μm Pd/1μm Cu, applied under eutectic tin/lead solder bumps, have been investigated with regard to their interfacial reactions and adhesion properties. The effects of the number of solder reflow cycles and the aging time on the growth of intermetallic compounds (IMCs) and on the solder ball shear strength were investigated. Good ball shear strength was obtained with 1μm Al/0.2μm Ti5μm Cu and 1μm Al/0.2μm Ni/1μm Cu even after four solder reflows or seven‐day aging at 150∞C. In contrast, 1μm Al/0.2μm Ti/1μm Cu and 1μm Al/0.2μm Pd/1μm Cu showed poor ball shear strength. The decrease of the shear strength was mainly due to the direct contact between solder and non‐wettable metals such as Ti and AL, resulting in a delamination. In this case, thin 1μm Cu and 0.2μm Pd diffusion barrier layers were completely consumed by Cu‐Sn and Pd‐Sn reaction.

As part of a programme of characterisation of interconnection technologies for computer server products the present investigation was conducted to determine the attachment integrity and long‐term reliability of resistor network ceramic Chip Scale Package (CSP) solder joints. Accelerated thermal cycling with electrical continuity monitoring of the solder joints was used to determine reliability. The thermal cycling was combined with metallographic examination of appropriate solder joints to evaluate the failure modes and to corroborate the failure thresholds. The measured reliability for the CSP solder joints was 1,027 thermal cycles. This implied an estimated minimum lifetime of 7.8 years for the product in a worst‐case field use. The reliability was virtually unaffected by the solder joint pad size and geometry on the board. All fatigue failed solder joints exhibited similar failure modes.

Components A distinction can be made between components with wire terminations (see Figure 28) and so‐called leadless components (see Figure 29). In between are the components with short terminations.

Understanding crack growth in solder joints is important for predicting the fatigue life of solder interconnects. In this paper, crack propagation in solder joints made of two solder alloys, 62Sn/36Pb/2Ag (by weight), a commonly used solder paste for SMT reflow applications, and 96.5Sn/3.5Ag (by weight), a lead‐free solder alloy, was examined during thermal cycling. Based on these observations, the rate of crack propagation was estimated. Microstructural changes in the solder during thermal cycling were also studied.

The wearout characteristics were investigated for soldered interconnections of surface mount technology (SMT) chip resistors, chip capacitors and a 44 I/O ceramic leaded chip carrier (CLCC) package. Four double‐sided test vehicles were subjected to accelerated thermal cycling in the — 10°C to + 110°C range; 30°C/min ramp rate; and 1 minute dwell time at each temperature extreme. The test was interrupted at initially 500 cycle and later at 1000 cycle intervals to perform visual inspection of all soldered interconnections, functional performance verification for the test vehicles, and resistance measurement on leaded SMT joints. Metallographic examinations and fractographic studies were also performed after 0, 4500 and 13000 cycles to characterise the micromechanisms of soldered joint strength degradation and failure. The wearout thresholds for soldered joints of chip resistors and capacitors on side 1 were respectively 2500 and 4500 cycles. The greater thermal fatigue resistance of the latter joints was attributed to a lower device‐substrate coefficient of thermal expansion (CTE) mismatch and a more favourable device geometry compared with chip resistors. These passive components on side 2, however, showed a virtually identical soldered joint wearout threshold of 6500 cycles. The constraints imposed by the applied mounting adhesive were primarily responsible for this behaviour. No correlation appeared to exist among various failure criteria used to determine the onset of failure for leaded SMT soldered connections. The concurrent monitoring of electrical resistance and the applied tensile load showed a modest relationship between the load drop and resistance increase, however. The test vehicles continued to pass the functional performance verification, even after 13000 thermal cycles. Nonetheless, the joint wearout thresholds were considered to be 2500, 4500 and 4500 cycles for chip resistor, chip capacitor and CLCC components, respectively. A 50% soldered joint strength drop was considered as the wearout threshold for the CLCC device. Metallographic examination showed limited barrel wall cracking of the vias and no evidence of cracks with the through‐hole soldered joints, even after 13000 thermal cycles.