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Bang-bang clock and data recovery (BBCDR) circuits are hard nonlinear systems due to the nonlinearity introduced by the binary phase detector (BPD). The specification of the CDR frequency response is determined by jitter tolerance and jitter transfer. In this paper, jitter transfer and jitter tolerance of the BBCDR are characterized. The paper aims to discuss these issues.

The presented method is general enough to be used for designing the BBCDR loop parameters to meet SONET jitter transfer requirements (loop bandwidth and jitter peaking).

In this paper, jitter transfer and jitter tolerance of the BBCDR are characterized by formulating the time domain waveforms. As a result, a new equation is presented to obtain angular frequency. Also, the jitter tolerance is expressed in closed form as a function of loop parameters. The validity of the resulted equations is verified through HSPICE simulations using TSMC 0.18-μm CMOS process. Simulation results show that good conformance between analytical equations and simulation results.

The proposed approach offers two advantages compared to conventional designing methods. First, this approach does not consider any value restriction to the capacitor. Second, a new condition has been presented to guarantee that the value of jitter peaking is approximately zero. The presented method is general enough to be used for designing the BBCDR.

Bang‐bang clock and data recovery (BBCDR) circuits are hard nonlinear systems due to the nonlinearity introduced by the binary phase detector (BPD). The specification of the CDR frequency response is determined by jitter tolerance and jitter transfer. In this paper, jitter transfer and jitter tolerance of the BBCDR are characterized.

The presented method is enough to be used for designing the BBCDR loop parameters.

In this paper, jitter characteristics of the BBCDR are characterized. As a result, a new equation is presented to obtain angular frequency. Also, the jitter tolerance is expressed in closed form as a function of loop parameters. The analysis is verified using behavioral simulations in MATLAB. Simulation results show that good conformance between analytical equations and simulation results.

The proposed approach offers two advantages compared to conventional designing methods. First, this approach does not consider any value restriction to the capacitor. Second, a new condition has been presented to guarantee that the value of jitter peaking is approximately zero.

The concept of a single, ‘authoritative text’ for literary works has been recognised for some years as unrealistic, and their polytextual nature accepted as a more authentic basis for the study of imaginative literature. At the same time, presentation of scholarly editions in the traditional paper medium continues to privilege one particular text (the ‘copy‐text’), relegating others to subordinate, fragmentary status as footnoted variants. There is, therefore, an inevitable conflict — perceived or not — between the conceptualisation of literary texts and the documentary form they currently take. Hypertext is thus proposed as an alternative medium for the publication and study of scholarly texts, which would provide a more helpful, flexible, and dynamic environment for the advanced study of imaginative literature. The proposition is illustrated by examples from a small‐scale experimental system, based on a seventeenth‐century collection of poetry, and using the Guide hypertext software.

The purpose of this paper is to design a low phase noise and high figure of merit, fully integrated, voltage‐controlled oscillator (VCO) which was fabricated in TSMC CMOS 0.18‐μm 1P6M process.

A differential PMOS cross‐coupled architecture VCO with the capacitive feedback technology was designed to increase the linearity of frequency tuning range and decrease the phase noise. Varactor determining the performance of tuning range is also a key component in the design of VCO. The authors adopt the accumulation‐mode MOS varactor. The output spectrum and the phase noise are measured by E5052A spectrum analyzer.

The VCO is successfully fabricated in TSMC RF CMOS 0.18um 1P6M process. The measured tuning range is from 10.875 GHz ∼ 11.1 GHz with control voltage from 0 to 1.5 V. The measured phase noise is as low as −120.42 dBc/Hz at 1 MHz offset and the high FOM is −189.5 dBc/Hz. The output spectrum is −10.51dBm with center oscillator frequency of 10.942 GHz. The core circuit without buffer consumes power of 15 mW from a 1.8 V supply voltage.

This paper shows a fully integrated CMOS LCVCO architecture using capacitive feedback technology with low phase noise and high figure of merit for OC‐192 SONET applications.

Offers advice to the Clinton‐Gore administration on how best to improve the confusion surrounding the development of the Internet. Chronicles major events in the development of NSFnet 1989‐1992. Gives political background and offers comments. Claims privatization was unplanned and flawed. Voices suspicion about the motives of large corporations, claiming that the best interests of “all Americans” are served by governmental supervision of the Internet. Acrimonious acronyms abound.

Imagine a state where a student teacher in a rural elementary school classroom can check the holdings of the school district's high school library, order a video from the regional audiovisual center, reserve books for her students in the local public library, search databases provided by the local community college, show her students how to use the World Wide Web, view artifacts displayed in the state historical society, request that full‐image articles be downloaded for her students to use, and send an e‐mail message to her professor at the state university about a problem she is having in her classroom. All without leaving the classroom. All from one interactive workstation. All without incurring any direct costs.

Computer networks are very complex and somewhat unpredictable systems in dynamic operations. Cybernetic modelling, incorporating stochastic, fuzzy variables, wherever appropriate, approximating interactions not easily tractable via a black‐box systems approach, may be more accurate. A method of analysis of computer networks is considered by representing subsystems and interactions, accurately as far as possible, and then utilising the results of systems sciences for analysis, including specifics, e.g. queuing systems. The aim is to identify correspondences between the behaviour of subsystems of networks and suitable analytic tools. Automation along such lines for the analysis and design of networks and other systems may be a possibility.

Based on work by Technology Task Group 1 (TTE‐1) for the IEEE‐USA/Cornell workshop on US telecommunications’ evolution. States the task group’s activity focused on local access Contains discussions on how fibre optics are used today and can be used in the future. Touches also on the technical and non‐technical challenges that a fibre to the home or fibre to the building network may face.

The writer of a review article in the IT area depends on a variety of information sources containing authoritative material, hyped‐up reports, or even partial or pure fiction. Sometimes articles are biased or the author has a particular axe to grind — for instance the person is associated with a company and the article is no more than a dressed up sales piece. Academics are usually reliable — although unlikely to damn themselves with faint praise if the next grant is round the corner. I will try to exercise good judgement when assessing my information sources, supressing my various prejudices if possible. But what is meant by the word new? For the purposes of this article ATM (Asynchronous Transfer Mode) protocol (rules) and ATM switches in broadband networks, and aspects of Cable‐TV and cable modems have received a lot of exposure. They will not be discussed here. However, there is much interest in the contest between fibreoptic systems to the home and the conversion of telephone lines to wideband lines. These topics will be discussed.