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Quantum-dot cellular automata (QCA) has attracted computer scientists as new emerging nanotechnology for replacement the current CMOS technology because it has unique characteristics such as high frequency, extremely small feature size and low power consumption. The main building blocks in QCA are the majority gate and inverter so any Boolean function can be represented using these gates. Many important circuits were the target for implemented in this technology in an optimal form, such as random-access memory (RAM) cell. QCA-RAM cells were introduced in literature with different forms but most of them are not optimized enough. This paper aims to demonstrate QCA inherent capabilities that can facilitate the design of many important gates such as the XOR gate and multiplexer (MUX) without following any Boolean function to get an optimum design in terms of complexity and delay.

In this paper, a novel structure of QCA-MUX in an optimal form will be used to design two unique structures of a RAM cell. The proposed RAM cells are the lowest cost required compared with different counterparts. The presented RAM cells used a new approach that follows the new suggested block diagram. The presented circuits are simulated and tested with QCADesigner and QCAPro tools.

The comparison of the proposed circuits with the previously reported in the literature show noticeable improvements in speed, area, and the number of cells. The cost function analysis results for the proposed RAM cells show significant improvement compared to older circuits.

A novel structure of QCA-MUX in an optimal form will be used to design two unique structures of a RAM cell.

This study aims to replace current multi-layer and coplanar wire crossing methods in QCA technology to avoid fabrication difficulties caused by them.

Quantum-dot cellular automata (QCA) is one of the newly emerging nanoelectronics technology tools that is proposed as a good replacement for complementary metal oxide semiconductor (CMOS) technology. This technology has many challenges, among them being component interconnection and signal routing. This paper will propose a new wire crossing method to enhance layout use in a single layer. The presented method depends on the central cell clock phase to enable two signals to cross over without interference. QCADesigner software is used to simulate a full adder circuit designed with the proposed wire crossing method to be used as a benchmark for further analysis of the presented wire crossing approach. QCAPro software is used for power dissipation analysis of the proposed adder.

A new cost function is presented in this paper to draw attention to the fabrication difficulties of the technology when designing QCA circuits. This function is applied to the selected benchmark circuit, and the results show good performance of the proposed method compared to others. The improvement is around 59, 33 and 75% compared to the best reported multi-layer wire crossing, coplanar wire crossing and logical crossing, respectively. The power dissipation analysis shows that the proposed method does not cause any extra power consumption in the circuit.

In this paper, a new approach is developed to bypass the wire crossing problem in the QCA technique.

In nano-scale-based very large scale integration technology, quantum-dot cellular automata (QCA) is considered as a strong and capable technology to replace the well-known complementary metal oxide semiconductor technology. In QCA technique, rotated majority gate (RMG) design is not explored greatly, and therefore, its advantages compared to original majority gate are unnoticed. This paper aims to provide a thorough observation at RMG gate with its capability to build robust circuits.

This paper presents a new methodology for structuring reliable 2n-bit full adder (FA) circuit design in QCA utilizing RMG. Mathematical proof is provided for RMG gate structure. A new 1-bit FA circuit design is projected here, which is constructed with RMG gate and clock-zone-based crossover approach in its configuration.

A new structure of a FA is projected in this paper. The proposed design uses only 50 number of QCA cells in its implementation with a latency of 3 clock zones. The proposed 1-bit FA design conception has been checked for its structure robustness by designing various 2, 4, 8, 16, 32 and 64-bit FA designs. The proposed FA designs save power from 46.87% to 25.55% at maximum energy dissipation of circuit level, 39.05% to 23.36% at average energy dissipation of circuit-level and 42.03% to 37.18% at average switching energy dissipation of circuit level.

This paper fulfills the gape of focused research for RMG with its detailed mathematical modeling analysis.

Developing and implementing strategies to maximize profitability is a fundamental challenge facing manufacturers. The complexity of orchestrating resources in practice has been overlooked in the operations field and it is now necessary to go beyond the direct effects of individual resources and uncover different resource configurations that maximize profitability. The paper aims to discuss these issues.

Drawing on a sample of US manufacturing firms, multiple regression analysis (MRA) and fuzzy set qualitative comparative analysis (fsQCA) are performed to examine the effects of resource orchestration on firm profitability over time. By comparing the findings between analyses, the study represents a move away from examining the net effects of resource levers on performance alone.

The findings characterize the resource conditions for manufacturers’ high performance, and also for absence of high performance. Pension and retirement expense is a core resource condition with R&D and SG&A as consistent peripheral conditions for profitability. Moreover, although workforce size was found to have a significant negative effect under MRA, this plays a role in manufacturers’ performance as a peripheral resource condition under fsQCA.

Accounting for different resource deployment configurations, this study deepens knowledge of resource orchestration and presents findings that enable manufacturers to maximize profitability. An empirical contribution is offered by the introduction of a new method for examining manufacturing strategy configurations: fsQCA.

Research in entrepreneurship is increasingly exploring how archetypes, taxonomies, typologies, and configurations can help scholars understand complex entrepreneurial phenomena. We illustrate the potential for set-theoretic methods to inform this literature by offering best practices regarding how qualitative comparative analysis (QCA) can be used to explore research questions of interest to entrepreneurship scholars. Specifically, we introduce QCA, document how this approach has been used in management research, and provide step-by-step guidance to empower scholars to use this family of methods. We put a particular emphasis on the analytical procedures and offer solutions to dealing with potential pitfalls when using QCA-based methods and highlight opportunities for future entrepreneurship research.

Quantum-dot cellular automata (QCA) is a promising technology, which seems to be the prospective substitute for complementary metal-oxide semiconductor (CMOS). It is a high speed, high density and low power paradigm producing efficient circuits. These days, most of the smart devices used for computing, make use of random access memory (RAM). To enhance the performance of a RAM cell, researchers are putting effort to minimize its area and access time. Multilayer structures in QCA framework are area efficient, fast and immune to the random interference. Unlike CMOS, QCA multilayer architectures can be designed using active components on different layers. Thus, using multilayer topology in the design of a RAM cell, which is not yet reported in the literature can improve the performance of RAM and hence, the computing device. This paper aims to present the modular design of RAM cell with multilayer structures in the QCA framework. The fundamental modules such as XOR gate, 2:1 multiplexer and D latch are proposed here using multilayer formations with the goal of designing a RAM cell with the provision of read, write, set and reset control.

All the modules used to design a RAM cell are designed using multilayer approach in QCA framework.

The proposed multilayer RAM cell is optimized and has shown an improvement of 20% in cell count, 30% in area, 25% in area latency product and 48.8% in cost function over the other efficient RAM designs with set/reset ability reported earlier. The proposed RAM cell is further analyzed for the fault tolerance and power dissipation.

Due to the multilayer structure, the complexity of the circuit enhances which can be eliminated using simple architectures.

The performance metrics and results obtained establish that the multilayer approach can be implemented in the QCA circuit to produce area efficient and optimized sequential circuits such as a latch, flip flop and memory cells.