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Enclosed print heads have recently been developed as an improvement on the traditional squeegee methods for solder paste printing. They offer the opportunity of widening the printing process window and reducing process waste. Consequently, this work was undertaken to evaluate some aspects of enclosed print head printing, and it has been shown to be a robust process. A number of performance factors were established: with increased humidity the paste degradation was limited due to its sealed paste reservoir; the system also permitted successful intermittent printing over a 5 day period; printing is much more tolerant to distorted substrates than some squeegee blades, and hence improves printing on non‐planar surfaces; significant reduction in paste wastage occurs, since paste ageing is reduced.

The paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on the printing performance. As the current product miniaturisation trend continues, area array type package solutions are now being designed into products. The assembly of these devices requires the printing of very small solder paste deposits. The printing of solder pastes through small stencil apertures typically results in stencil clogging and incomplete transfer of paste to the PCB pads. At the very narrow aperture sizes required for flip‐chip applications, the paste rheology becomes crucial for consistent paste withdrawal. This is because, for smaller paste volumes, surface tension effects become dominant over viscous flow. Proper understanding of the effect of the key material, equipment and process parameters, and their interactions, is crucial for achieving high print yields. During the aperture filling and emptying sub‐process, the solder paste experiences forces/stresses as it interacts with the stencil aperture walls and the pad surfaces, which directly impact the paste flow within the apertures. As the substrate and stencil separate, the frictional/adhesive force on the stencil walls competes directly with the adhesives/pull force on the PCB pads, often resulting in incomplete paste transfer or skipping/clogged apertures. In this paper, we investigate the effect of stencil design on the printing process and in particular the effect on paste transfer efficiency.

Soldering technologies continue to evolve to meet the demands of the continuous miniaturisation of electronic products, particularly in the area of solder paste formulations used in the reflow soldering of surface mount devices. Stencil printing continues to be a leading process used for the deposition of solder paste onto printed circuit boards (PCBs) in the volume production of electronic assemblies, despite problems in achieving a consistent print quality at an ultra‐fine pitch. In order to eliminate these defects a good understanding of the processes involved in printing is important. Computational simulations may complement experimental print trials and paste characterisation studies, and provide an extra dimension to the understanding of the process. The characteristics and flow properties of solder pastes depend primarily on their chemical and physical composition and good material property data is essential for meaningful results to be obtained by computational simulation.This paper describes paste characterisation and computational simulation studies that have been undertaken through the collaboration of the School of Aeronautical, Mechanical and Manufacturing Engineering at Salford University and the Centre for Numerical Modelling and Process Analysis at the University of Greenwich. The rheological profile of two different paste formulations (lead and lead‐free) for sub 100 micron flip‐chip devices are tested and applied to computational simulations of their flow behaviour during the printing process.

The purpose of this paper is to study the effect of the electropolishing time of stencil manufacturing parameters and solder‐mask definition methods of PCB pad design parameters on the performance of solder paste stencil printing process for the assembly of 01005 chip components.

During the study, two types of stencils were manufactured for the evaluations: electroformed stencils and electropolished laser‐cut stencils. The electroformed stencils were manufactured using the standard electroforming process and their use in the paste printing process was compared against the use of an electropolished laser‐cut stencil. The electropolishing performance of the laser‐cut stencil was evaluated twice at the following intervals: 100 s and 200 s. The performance of the laser‐cut stencil was also evaluated without electropolishing. An optimized process was established after the polished stencil apertures of the laser‐cut stencil were inspected. The performance evaluations were made by visually inspecting the quality of the post‐surface finishing for the aperture wall and the quality of that post‐surface finishing was further checked using a scanning electron microscope. A test board was used in a series of designed experiments to evaluate the solder paste printing process.

The results demonstrated that the length of the electropolishing time had a significant effect on the small stencil's aperture quality and the solder paste's stencil printing performance. In this study, the most effective electropolishing time was 100 s for a stencil thickness of 0.08 mm. The deposited solder paste thickness was significantly better for the enhanced laser‐cut stencil with electropolishing compared to the conventional electroformed stencils. In this printing‐focused work, print paste thickness measurements were also found to vary across different solder‐mask definition methods of printed circuit board pad designs with no change in the size of the stencil aperture. The highest paste value transfer consistently occurred with solder‐mask‐defined pads, when an electropolished laser‐cut stencil was used.

Due to important improvements in the quality of the electropolished laser‐cut stencil, and based on the results of this experiment, the electropolished laser‐cut stencil is strongly recommended for the solder paste printing of fine‐pitch and miniature components, especially in comparison to the typical laser‐cut stencil. The advantages of implementing a 01005 chip component mass production assembly process include excellent solder paste release, increased solder volume, good manufacture‐ability, fast turnaround time, and greater cost saving opportunities.

12 mil pitch processing is achievable with solder paste. It may also be the limit of solder paste printing technology, mainly due to the scooping problem associated with thin stencils. With decreasing pitch size, both smear and insufficiency rate increase. Tapering of stencil aperture helps thick stencil prints, but has an adverse effect on thin stencil printing. Apertures with orientation parallel to squeegee movement result in a higher print defect rate. Overall, the use of fine powders is the most effective means to meet most challenges. It helps in achieving high performance in printability, tack and non‐slump, with acceptable trade‐offs in rheology and tack time. Solder balling may be the primary drawback. The problem may be resolved by using inert reflow atmosphere or via flux chemistry improvements. A metal load of 90.5 to 91% seems to be the optimum for most properties.

The purpose of this paper is to investigate and minimize the printing-related defects in the surface mount assembly (SMA) process.

This paper uses an experimental approach to explore process parameter and printing defects during the SMA process. Increasing printing performance, various practices of solder paste (Ag3.0/Cu0.5/Sn) storage and handling are suggested. Lopsided paste problem is studied by varying squeegee pressure and the results are presented. Unfilled pads problems are observed for ball grid array (BGA) and quad flat package (QFP) which is mitigated by proper force tuning. In this paper, a comparative study is conducted which evaluates the manifestation of printing offset due to low-grade stencil. The input/output (I/O) boards were oxidized when the relative humidity was maintained beyond 70 per cent for more than 8 h. This pad oxidation problem is overcome by proper printed circuit board (PCB) handling procedures. When the unoptimized line is used, the paste wedged in the stencil and influences the performance of the screen printer, for this reason, an optimized line is proposed that minimize the printing defects.

The key findings are as follows: in the SMA process, printing quality is directly associated with solder paste quality. Experimentally, it is observed that a considerable variance in solder deposition occurred when the front and rear squeegee have different configurations. High-grade and unsoiled stencil results in superior paste deposition and less distinction. Insufficient solder paste and bridge problems also occur in printing when PCB pads are oxidized. Optimized line resolves solder paste clog issues, associated with stencil’s aperture. The cooling arrangement on the conveyor, after reflow, explicates hot jig problem. Control environmental conditions minimized static charges and printing defects.

The preceding studies emphasis mostly on the squeegee pressure, while other important parameters are not completely investigated. Moreover, it is very imperative to concurrently measure all parameters while varying the environmental conditions. This study highlights and provides an experimental approach to various PCB printing defects, and a comparative study has been conducted that concurrently measure all process parameters.

This paper examines the rôle that the squeegee plays in the solder paste printing process. Although the printing of solder paste is only one stage of many in the surface mount assembly process, it is crucial to deposit the correct amounts of solder paste cleanly onto the substrate. The amount of solder paste deposited affects the reliability and strength of the reflowed solder joint. Surface mount component lead pitches are continually being reduced due to the requirements of packing more and more components into a given space on the PCB, and this necessitates a proper understanding of the printing process and in particular of the squeegee which plays an important part in determining paste heights and the occurrence of defects. The paper outlines a model which predicts scooping and skipping in the stencil printing of solder pastes used in the reflow soldering of surface mounted devices. The model is based on the forces acting on the squeegee blade, which determines the paste flow pattern ahead of the squeegee, and on the stencil aperture geometry. The paper also examines the interactions between the paste properties and squeegee material properties. These interactions produce printing defects such as scooping, skipping and wet bridging. Results of an experimental comparison of different types of squeegee blade used in the stencil printing of solder pastes for reflow soldering in SMT, as well as the experimental results for squeegee deformation into stencil apertures, were used for validating the model. The empirically enhanced model which results takes into account the force on the squeegee due to solder paste flow and some of the non‐Newtonian properties of the solder paste. The main utility of the proposed model is the control of solder paste printing quality.

This research aims to study the stencil printing process of the quad flat package (QFP) component with a pin pitch of 0.4 mm. After the optimization of the printing process, the desired inspection specification is determined to reduce the expected total process loss.

Static Taguchi parametric design is applied while considering the noise factors possibly affecting the printing quality in the production environment. The Taguchi quality loss function model is then proposed to evaluate the two types of inspection strategies.

The optimal parameter-level treatment for the solder paste printing process includes a squeegee pressure of 11 kg, a stencil snap-off of 0.14 mm, a cleaning frequency of the stencil once per printing and using an air gun after stencil wiping. The optimal upper and lower specification limits are 119.8 µm and 110.3 µm, respectively.

Noise factors in the production environment are considered to determine the optimal printing process. For specific components, the specification is established as a basis for subsequent processes or reworks.

The study investigates the sub process behaviour in stencil printing of type‐6 and type‐7 particle size distribution (PSD) Pb‐free solder pastes to assess their printing limits.

Two solder pastes were used in a design of experiments approach to find optimal printing parameters

Solder paste printing has been achieved to ultimately produce 30 μm deposits at 60 μm pitch for full area array patterns using a type‐7 Pb‐free solder paste. For a type‐6 PSD solder paste, full area array printing was limited to 50 μm deposits at 110 μm pitch. However, for peripheral printing patterns, 50 μm deposits at 90 μm pitch were obtained. The disparities in the behaviour of the two paste types at different geometries can be attributed to differences in the sub‐processes of the stencil printing. The paste release of the type‐6 paste from the stencil apertures at fine pitch was superior to the type‐7 paste, which may be attributed to the finer particle paste producing an increased drag force along the stencil aperture walls. However, the type‐7 paste was able to fill the smallest aperture openings, ultimately to 30 μm, thus producing full array printing patterns at uniquely small pitches.

This advancement in the stencil printing process has been made possible by refinements to both solder paste design and stencil manufacturing technology. Adjustments in the solder paste rheology have enabled successful printing at ultra fine pitch geometries. This, together with selecting appropriate printing parameters such as printing speed, pressure, print gap and separation speed, allows a practical printing process window. Moreover, advancements in stencil fabrication methods have produced “state‐of‐the‐art” stencils exhibiting very precisely defined aperture shapes, with smooth walls at very fine pitch, thus allowing for improved solder paste release at very small dimensions.

The results can be used to present a low cost solution for Pb‐free flip chip wafer bumping. Furthermore, the results indicate that type‐6 and type‐7 solder pastes should be applied to/selected for specific application geometries.

This paper aims to establish the predictive equations of height, area and volume of printed solder paste during solder paste stencil printing (SPSP) process in surface mount technology (SMT) to better understand the effect of process parameters on the printing quality.

An experiment plan is proposed based on the response surface method (RSM). Experiments with 30 different combinations of process parameters are performed using a solder paste printer. After printing, the volume, area and height of the printed SAC105 solder paste are measured by a solder paste inspection machine. Using RSM, the predictive equations associated with the printing parameters and the printing quality of the solder paste are formed.

The optimal printing parameters are 175.08 N printing pressure, 250 mm/s printing speed, 0.1 mm snap-off height and 15.7 mm/s stencil snap-off speed if the target height of solder paste is 100 µm. As the target printing area of solder paste is 1.1 mm × 1.3 mm, the optimized values of the printing parameters are 140.29 N, 100.52 mm/s, 0.63 mm and 20.25 mm/s. When both the target printing height and area are optimized together, the optimal values for the four parameters are 86.67 N, 225.76 mm/s, 0.15 mm and 1.82 mm/s.

A simple RSM-based experimental method is proposed to formulate the predictive polynomial equations for height, area and volume of printed solder paste in terms of important SPSP parameters. The predictive equation model can be applied to the actual SPSP process, allowing engineers to quickly predict the best printing parameters during parameter setting to improve production efficiency and quality.