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The purpose of this study is to develop an algorithm to accurately detect faults in series capacitor compensated (SCC) power transmission lines. The line fault must be distinguished from stable power swing, compensating unit malfunction and defects on other lines sharing the same bus (external faults).

In this regard, an effective fault feature extractor based on the cumulative sum (CUSUM) of the amplified second harmonic of the phase currents is suggested. The features are then applied to an artificial neural network for classification. No-fault cases include stable power swing and several disturbances. Due to the independent analysis of each phase, faulty phase detection is also a by-product.

Various fault scenarios are defined, and the algorithm success rate is compared with some newly published methods. Extensive simulations performed over a single-machine infinite bus, a 3-machine, 9-bus and the large-scale New England IEEE 39-Bus networks all indicate that the proposed algorithm can trip the faulty line more quickly and accurately than the contestant algorithms.

Suggestion of a new algorithm based on the CUSUM of the amplified second harmonic of the phase current for the fault feature extraction that is able to isolate the transmission line internal faults from stable poser swing, line compensating unit malfunction and faults on the adjacent lines connected to the same bus.

This paper proposes an ANN based adaptive damping control scheme for the unified power flow controller (UPFC) to damp the low frequency electromechanical power oscillations. In this paper a novel damping control strategy based on the time‐domain analysis of system transient energy function (TEF) is proposed and implemented by using well tuned conventional PI controllers to obtain the preliminary training data for the design of the proposed controllers. The multi‐layered feed forward neural network with error back‐propagation training algorithm is employed in this study. Models of UPFC and ANN controllers suitable for incorporating with the transient simulation programs are derived and tested on a revised IEEE nine‐bus test system. Comprehensive simulation results demonstrate the great potential of using UPFC in damping control and the excellent performance of the proposed control scheme.

Fatigue associated with shift work is a well-established and pervasive problem in policing that affects officer performance, safety, and health. It is critical to understand the extent to which fatigue degrades officer driving performance. Drowsy driving among post-shift workers is a well-established risk factor yet no data are available about officer injuries and deaths due to drowsy driving. The purpose of this paper is to assess the impact of fatigue associated with work shift and prior sleep on officers’ non-operational driving using laboratory experiments to assess post-shift drowsy driving risks and the ability of a well-validated vigilance and reaction-time task to assess these risks.

Experienced police patrol officer volunteers (n=78) from all four shifts of a medium-sized city’s police department were tested using a within- and between-subjects design to assess the impact of fatigue on individual officers, as well as the impact of different work shifts, on post-shift driving performance. Controlled laboratory experiments were conducted during which participants drove high-fidelity driving training simulators on two occasions: immediately following five consecutive 10:40-hour patrol shifts (fatigued condition) and again 72 hours after completing the last shift in a work cycle (rested condition).

Generalized linear mixed-model analyses of driving performance showed that officers working night shifts had significantly greater lane deviation during post-shift, non-operational driving than those working day shifts (F=4.40, df=1, 150, p=0.038). The same method also showed that easy to measure psychomotor vigilance test scores for reaction time predicted both lane deviation (F=31.48, df=1, 151, p < 0.001) and collisions (F=14.10, df=1, 151, p < 0.001) during the simulated drives.

Simulated driving tasks done by participants were generally less challenging than patrol or off-duty driving and likely underestimate the impact of fatigue on police driving post-shift or during extended shifts.

This is the first experimental research to assess the impact of shiftwork, fatigue, and extended shifts on police post-shift drowsy driving, a known risk factor for shift workers in general.

This study conceptualizes the equity gap (EG) in construction contracting and examines its impact on project performance.

The identification of EG was first summarized from a literature review. A conceptual framework that included EG elements of information, risks, expected return and power asymmetry was then proposed. A study of the Hong Kong–Zhuhai–Macau Bridge supported the existence of EG. The framework was further refined by incorporation of 21 EG identifications. To examine the reliability of the framework, data were collected from 106 senior project professionals to evaluate the extent to which EG identification occurred in their projects. A Partial Least Square–Structural Equation Modeling (PLS-SEM hereafter) analysis was conducted on the collected data.

The proposed framework was deemed statistically significant. Furthermore, no significant differences were detected between the developer and contractor. The concepts of asset and process specificities suggested that the unaddressed EG may be met with retaliatory behaviors, such as noncooperation, procrastination, opportunism and withdrawal, as the physical works proceed. These behaviors may also hamper project performance.

To address the EG ex post, it is suggested that relational incentives to balance the power differential be set, reallocation of risks and return and enhancing task programmability for ease of monitoring and performance evaluation.

This study investigates the downside of the EG between the contracting parties. The proposed EG framework informs the project management of critical EG elements and possible methods to narrow the gap ex post. Practical suggestions are also provided to manage construction contracts in general and in the use of incentive schemes to address EG.

Oscillations and related stability problems of synchronous generators are harmful and can lead to power outage. Studies have shown that currently available commercial applications of power system stabilizers (PSSs) do not ensure damping of modern generators operating in contemporary power systems at peak performances. The purpose of this paper is to contribute to development of the new PSS, which would replace currently used linear stabilizers.

A synthesis of theoretical research, numerical simulations and laboratory experiments was the basic framework.

Within a problem analysis, it was empirically confirmed that the currently used PSSs are not up to the needs of the present power systems. Based on an analysis of the contemporary solutions, it was found out that the most appropriate solutions are adaptive control and robust control. In this paper, the robust sliding mode theory was implemented for the PSS design.

The most notable restriction of rapid transfer of scientific solutions into a practice represents limited testing of proposed solutions on synchronous generators in power plants.

The new PSS which would replace currently used conventional stabilizers will have an exceptional value for all producers of the excitation systems.

The originality of the paper represents the development of the new robust sliding mode PSS and qualitative assessment of the developed stabilizer with two competitive stabilizers, i.e. the conventional linear- and advanced direct adaptive-PSS.

The purpose of this paper is to demonstrate the applicability of the Discrete Empirical Interpolation method (DEIM) for simulating the swing dynamics of benchmark power system problems. The authors demonstrate that considerable savings in computational time and resources are obtained using this methodology. Another purpose is to apply a recently developed modified DEIM strategy with a reduced on-line computational burden on this problem.

On-line computational cost of the power system dynamics problem is reduced by using DEIM, which reduces the complexity of the evaluation of the nonlinear function in the reduced model to a cost proportional to the number of reduced modes. The on-line computational cost is reduced by using an approximate snap-shot ensemble to construct the reduced basis.

Considerable savings in computational resources and time are obtained when DEIM is used for simulating swing dynamics. The on-line cost implications of DEIM are also reduced considerably by using approximate snapshots to construct the reduced basis.

Applicability of DEIM (with and without approximate ensemble) to a large-scale power system dynamics problem is demonstrated for the first time.

This paper aims to propose a novel balance-assistive control strategy for hip exoskeleton robot.

A hierarchical balance assistive controller based on the virtual stiffness model of extrapolated center of mass (XCoM) is proposed and tested by exoskeleton balance assistive control experiments.

Experiment results show that the proposed controller can accelerate the swing foot chasing XCoM and enlarge the margin of stability.

As a proof of concept, this paper shows the potential for exoskeleton to actively assist human regain balance in sagittal plane when human suffers from a forward or backward disturbing force.

Low power static‐random access memories (SRAM) has become a critical component in modern VLSI systems. In cells, the bit‐lines are the most power consuming components because of larger power dissipation in driving long bit‐line with large capacitance. The cache write consumes considerable large power due to full voltage swing on the bit‐line. The aim of the paper is to propose a new SRAM cell architecture to reduce the power consumption during write 0 and write 1 operation.

The proposed circuit includes two tail transistors in the pull‐down path of inv‐A and inv‐B. The simulated results of the proposed cell is compared with Conventional 6T SRAM cell and zero‐asymmetric SRAM cell.

The proposed SRAM cell consumes less power than the conventional SRAM cell during write operation. The write access delay is reported to be lower than conventional and ZA SRAMs in the proposed circuit. The read operation is similar to Conventional SRAM cell but due to tail transistors the read access delay and stability is poor in the present circuit which can be improved by careful transistors sizing.

The paper proposes a SRAM cell to reduce the power in write “0” as well as write “1”operation by introducing two tail transistors.

The purpose of this work is to reduce the power consumption of KSA and to improve the PDP for data path applications. In digital Very Large – Scale Integration systems, the addition of two numbers is one of the essential functions. This arithmetic function is used in the modern digital signal processors and microprocessors. The operating speed of these processors depends on the computation of the arithmetic function. The speed computation block for most of the datapath elements was adders. In this paper, the Kogge–Stone adder (KSA) is designed using XOR, AND and proposed OR gates. The proposed OR gate has less power consumption due to the less number of transistors. In arithmetic logic circuit power, delay and power delay products (PDP) are considered as the important parameters. The delays reported for the proposed OR gate are less when compared with the conventional Complementary Metal Oxide Semiconductor (CMOS) OR gate and pre-existing logic styles. The proposed circuits are optimized in terms of power, delay and PDP. To analyze the performance of KSA, extensive Cadence Virtuoso simulations are used. From the simulation results based on 45 nm CMOS process, it was observed that the proposed design has obtained 688.3 nW of power consumption, 0.81 ns of delay and 0.55 fJ of PDP at 1.1 V.

In this paper, a new circuit for OR gate is proposed. The KSA is designed using XOR, AND and proposed OR gates.

The proposed OR gate has less power consumption due to the less number of transistors. The delays reported for the proposed OR gate are less when compared with the conventional CMOS OR gate and pre-existing logic styles. The proposed circuits are optimized in terms of power, delay and PDP.

In arithmetic logic circuit power, delay and PDP are considered as the important parameters. In this paper, a new circuit for OR gate is proposed. The power consumption of the designed KSA using the proposed OR gate is very less when compared with the conventional KSA. Simulation results show that the performance of the proposed KSA are improved and suitable for high speed applications.

The paper aims to present a simple rail‐to‐rail CMOS voltage follower.

The circuit is developed based on a complementary source follower with a common‐source output stage. The circuit is designed using a 0.13 μm CMOS technology, and operates under the supply voltage of 1.5 V. HSPICE is used to verify the circuit performance.

The simulations show output voltage swing of ±0.6 V (300 Ω load) with the total harmonic distortion of 0.55 per cent at the operating frequency of 3 MHz. The bandwidth and power dissipation are 657 MHz and 405 μW, respectively.

A simple rail‐to‐rail CMOS voltage follower is presented.