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The purpose of this paper is to comprehensively explore the effects of critical parameters on solder deposition and to establish a systematic approach for determining guidelines for solder paste inspection (SPI) workstations.

This study explored the effects of process parameters, stencil and printed circuit board designs on solder deposition and identified the major post‐reflow defect scenarios. Through the investigation of correlation between the results of SPI analysis and post‐reflow defective scenarios, SPI specifications are suggested for minimizing the total cost of poor quality.

The higher the printing pressure the lower the solder deposition. There was a significant difference in solder deposition between the front squeegee and the rear squeegee. Insufficient distance between the stencil aperture and the initial printing location resulted in irregular solder paste and variations in solder deposition. A stencil with a higher area ratio resulted in greater solder deposition and less variation. Stencil apertures parallel to the direction of printing were superior to a 45° vector print. Further, the nominal solder thickness should take into account the thicknesses of the solder mask and the legend ink. There was an offset in the results of SPI measurements between the solder mask defined (SMD) pads and non‐SMD pads. The specifications for solder deposition with irregular stencil apertures need to be adjusted.

To address the arbitrariness of existing industry practice, this study was a joint effort with a Taiwan‐based electronics manufacturing service company. Real data were taken from a mass production environment and inferences were then made based on a statistical analysis.

0201 assembly plays a very important role in the continuing miniaturization of electronics products. After a systematic study using Sn‐Pb solder paste on pad design, machine evaluation, component qualification, and process optimisation, this study focused on the PCB assembly process for 0201 packages using Sn‐Ag‐Cu solder paste. The post‐reflow solder defects for a range of different spacings were examined for the different solder pastes.

It was observed that “no solder” or “skipped solder” defects occurred on a particular printed circuit board assembly product during wave soldering. Investigations were carried out to find out the cause of this defect and to recommend an optimal hot air level coating thickness. To evaluate whether thicker plating helps to produce better solderability, new printed circuit boards with an average plating thickness of 4.27 μm were sent for solderability testing. This increase in plating thickness resulted in no defects in the solderability test. This is in contrast to the current printed circuit board that had a no/skipped solder defect rate of 1,433 ppm due to the thinner plating thickness which was in the region of 2.26 μm. In summary, the investigations made have revealed imperfections in the pad plating, and it is recommended that a thicker or more even plating is achieved during the hot air levelling process at the printed circuit board manufacturing site so as to eliminate no/skipped solder defects that are induced by this printed circuit board deficiency.

This paper aims to study the influence of reflow atmosphere and placement accuracy on the solderability of 01005 capacitor/SAC305 solder joints.

The 01005 capacitors were mounted on OSP-coated pads, and the samples were fabricated in four different atmospheres, i.e. 200 ppm O₂/N₂, 1,000 ppm O₂/N₂, 3,000 ppm O₂/N₂ and air. After the reflow process, visual inspection and X-ray detection were carried out to examine the solder joint shapes and possible defects. Some of the samples fabricated in different conditions were cross-sectioned and the solder joint microstructures were analyzed. On the other hand, besides placing the components on their normal pad positions, a 50 per cent offset of the x-axis (long axis) or y-axis (short axis) was introduced into the chip mounter programs to evaluate the 01005 capacitor’s assembly sensitivity to placement accuracy. The process-induced defects were investigated.

Experimental results indicated that an N₂-based protective atmosphere was necessary for 01005 type assembly, as it could obviously improve the 01005 solder joint quality, compared with the air condition. The protective atmosphere had little effect on the appearance, quality and microstructure of solder joints when the oxygen concentration was below 3,000 ppm. But a very low oxygen concentration could increase the risk of tombstoning defects for the assembly process. The N₂-based protective atmosphere containing 1,000-2000 ppm O₂ was acceptable and appropriate for the assembly of tiny components.

The results of this work provide a set of reflow process parameters and recommendations for 01005 size component assembly in manufacturing.

Historically, tin‐lead solder has been a commonly used joining material in electronics manufacturing. Environmental and health concerns, due to the leaching of lead from landfills into ground water, have necessitated legislation that restricts the use of lead in electronics. The transition from tin‐lead solder to a lead‐free solder composition is imminent. Several alternative solder alloys (and their fluxes) have been researched for electronics assembly in the last few years. The objective of this research was to develop a systematic selection process for choosing a “preferred” lead‐free solder paste, based on its print and reflow performance.

After a detailed study of industry preferences, published experimental data, and recommendations of various industrial consortia, a near eutectic tin‐silver‐copper (SAC) composition was selected as the preferred alloy for evaluation. Commercially available SAC solder pastes with a no‐clean chemistry were extensively investigated in a simulated manufacturing environment. A total of nine SAC pastes from seven manufacturers were evaluated in this investigation. A eutectic Sn/Pb solder paste was used as a baseline for comparison. While selecting the best lead‐free paste, it was noted that the selected paste has to perform as good as, if not better than, the current tin‐lead paste configuration used in electronics manufacturing for a particular application. The quality of the solder pastes was characterized by a series of analytical and assembly process tests consisting of, but not limited to, a printability test, a solder ball test, a slump test, and post reflow characteristics such as the tendency to form voids, self‐centring and wetting ability.

Each paste was evaluated for desirable and undesirable properties. The pastes were then scored relative to each other in each individual test. An aggregate of individual test scores determined the best paste.

This paper summarizes a systematic approach adopted to evaluate lead‐free solder pastes for extreme reflow profiles expected to be observed in reflow soldering lead‐free boards.

To predict the reliability life for SnPb solder and Ag‐Pd bond pad metallization. The aim of selected artificial aging using temperature shock test (TST) and high temperature storage test (HTS). These tests are produced in a short time, the same deterioration in solder joint strength that would occur by natural aging in the actual field condition of up to 10 years or 5,000 h service life.

This paper using Arrhenius model describes the results of TST and HTS. The TST is aimed to verify the resistance of the assembly to cyclic temperature loading. The HTS test is aimed to check the effect of inter‐diffusion between solder and component and substrate finish, on the mechanical strength of the joints. The paper is organized in four sections: introduction, experimental procedure, experimental results and discussion, conclusion and recommendation.

The accelerated aging procedures used in this study had successfully modified mainly the outer surface and the interface between a solderable coating and the base metal. The tests that rely on higher temperature increase the diffusivity and the reactivity of the species and so modify internal interfaces such as the intermetallic compound layer, as well as the surface oxide layer. This has provided an effective screening test in understanding the reliability field performance.

For future work it is recommended to run HTS at 175C to validate the estimate for the effective activation energy for diffusion. Next, perform scanning electron microscopy & energy dispersive X‐ray (SEM/EDX) analysis to compare results at 150C for SMD components and studs and explain the different behaviour. Finally, continue T‐shock testing to 2000 cycles.

This has provided an effective screening test in understanding the reliability field performance.

This paper provides a cost effective and practical procedure in screening test for SnPb Solder and Ag‐Pd bond pad metallization. It is an effective solution to electronic manufacturing industry.