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Article
Publication date: 2 September 2014

De-Xing Peng

The purpose of this paper is to investigate the effects of abrasive contents, oxidizer contents, slurry flow rate and polishing time in achieving a mirror-like finish on polished…

Abstract

Purpose

The purpose of this paper is to investigate the effects of abrasive contents, oxidizer contents, slurry flow rate and polishing time in achieving a mirror-like finish on polished surfaces. Chemical mechanical polishing (CMP) is now widely used in the aerospace industry for global planarization of large, high value-added components.

Design/methodology/approach

Optimal parameters are applied in experimental trials performed to investigate the effects of abrasive contents, oxidizer contents, slurry flow rate and polishing time in achieving a mirror-like finish on polished surfaces. Taguchi design experiments are performed to optimize the parameters of CMP performed in steel specimens.

Findings

Their optimization parameters were found out; the surface scratch, polishing fog and remaining particles were reduced; and the flatness of the steel substrate was guaranteed. The average roughness (Ra) of the surface was reduced to 6.7 nm under the following process parameters: abrasive content of 2 weight per cent, oxidizer content of 2 weight per cent, slurry flow rate of 100 ml/min and polishing time of 20 min.

Originality/value

To meet the final process requirements, the CMP process must provide a good planarity, precise selectivity and a defect-free surface. Surface planarization of components used to fabricate aerospace devices is achieved by CMP process, which enables global planarization by combining chemical and mechanical interactions.

Details

Industrial Lubrication and Tribology, vol. 66 no. 6
Type: Research Article
ISSN: 0036-8792

Keywords

Article
Publication date: 1 April 1998

Gerhard Klink and Andreas Drost

Coating and lithography steps in thin‐film processing require planar and smooth surfaces. Usually ceramic substrates with as‐fired surface roughness of Ra < 0.1µm or with polished…

Abstract

Coating and lithography steps in thin‐film processing require planar and smooth surfaces. Usually ceramic substrates with as‐fired surface roughness of Ra < 0.1µm or with polished surfaces for advanced requirements are used. In general, a thick‐film hybrid has an inappropriate surface for further successful thin‐film processing. In this work, the influence of surface roughness and topography on the properties of thin‐film conductors and the fabrication of vias is investigated. Surface smoothing and local planarisation can be achieved by the use of a thick‐film overglaze or by coating the surface with polyimide prior to thin‐film processing. The improvements in conductor and via yield are measured by adequate test structures with a conductor width of 25µm. Based on the results, a process is given to provide a thick‐film multilayer with a sufficient smooth and planar surface suitable for thin‐film processes.

Details

Microelectronics International, vol. 15 no. 1
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 1 August 1997

O.S. Aleksić, P.M. Nikolić, D. Vasiljević‐Radović, Luković and S. Durić

A variety of thick film planar inductors, designed forapplications in the HF range, were printed from conductive PdAg and NiFe2O4 ferrite paste on alumina substrate. Pure ferrite…

276

Abstract

A variety of thick film planar inductors, designed for applications in the HF range, were printed from conductive PdAg and NiFe2O4 ferrite paste on alumina substrate. Pure ferrite powder with a nanometric particle size was used in the NiFe2O4 paste preparation. The ferrite thick film layer characterisation was performed on small spirals, after which the following inductor planar geometries were tested together with ferrite layers: meanders, spirals, bispirals and solenoid in plane. Their impedance was analysed with an impedance analyser in the MHz‐GHz range. The results obtained were compared with the properties of the smallest cubic inductors and with the literature data for planar inductors (theoretical and practical). A comparison was made of the L geometries printed. It was observed that better utilisation of the thick ferrite layers was achieved on L geometries with equally distributed windings over the thick ferrite layers.

Details

Microelectronics International, vol. 14 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 1 February 1990

D. Volfson and S.D. Senturia

This paper describes a process for fabricating high density multilayer polyimide‐metal interconnect structures for packaging applications such as multichip carriers, flex circuits…

Abstract

This paper describes a process for fabricating high density multilayer polyimide‐metal interconnect structures for packaging applications such as multichip carriers, flex circuits and multiconductor TAB tape. The process combines the advantages of a semi‐additive via process, such as the uniformity of the electroplated vias and the ability to produce vertical stacked‐up vias, with a processing sequence that does not require a temporary plating mask for vias or a planarisation/via‐top‐exposure step. The key idea behind the process is the fact that all of the circuitry in a multilayer interconnect is electrically connected to the upper conductor layer. This allows building the interconnect upside down on a temporary substrate using a continuous bottom level metallisation as an electrode for plating all level vias. This layer eventually becomes the upper conductor. After the processing is complete, the multilayer interconnect structure is either released from the temporary substrate, resulting in a multilevel multichip interconnect. After the multilevel structure is released, the continuous metal, which was on the bottom, is patterned with the upper conductor pattern, isolating the individual circuits. As an example, a process sequence for building a three‐metal‐layer substrate with 5 ?m by 30 ?m copper conductors, 50 ?m by 50 ?m square vias with 15 ?m interlayer polyimide is presented along with electrical test data. The process can be extended to producing mixed‐geometry multiconductor tape structures for TAB that result in tape frames with controlled conductor properties, and offer the potential for finer geometries for TAB fingers than are now available through conventional TAB tape processes.

Details

Circuit World, vol. 16 no. 3
Type: Research Article
ISSN: 0305-6120

Article
Publication date: 27 April 2010

Adam Cohen, Richard Chen, Uri Frodis, Ming‐Ting Wu and Chris Folk

The purpose of this paper is to familiarize the reader with the capabilities of EFAB technology, a unique additive manufacturing process which yields fully assembled, functional…

2706

Abstract

Purpose

The purpose of this paper is to familiarize the reader with the capabilities of EFAB technology, a unique additive manufacturing process which yields fully assembled, functional mechanisms from metal on the micro to millimeter scale, and applications in medical devices.

Design/methodology/approach

The process is based on multi‐layer electrodeposition and planarization of at least two metals: one structural and one sacrificial. After a period of initial commercial development, it was scaled up from a prototyping‐only to a production process, and biocompatible metals were developed for medical applications.

Findings

The process yields complex, functional metal micro‐components and mechanisms with tight tolerances from biocompatible metals, in low‐high production volume.

Practical implications

The process described has multiple commercial applications, including minimally invasive medical instruments and implants, probes for semiconductor testing, military fuzing and inertial sensing devices, millimeter wave components, and microfluidic devices.

Originality/value

The process described in this paper is unusual among additive fabrication processes in being able to manufacture in high volume, and in its ability to produce devices with microscale features. It is one of only a few additive manufacturing processes that can produce metal parts or multi‐component mechanisms.

Details

Rapid Prototyping Journal, vol. 16 no. 3
Type: Research Article
ISSN: 1355-2546

Keywords

Article
Publication date: 4 February 2014

De-Xing Peng

Chemical mechanical polishing (CMP) has attracted much attention recently because of its importance as a nano-scale finishing process for high value-added large components that…

Abstract

Purpose

Chemical mechanical polishing (CMP) has attracted much attention recently because of its importance as a nano-scale finishing process for high value-added large components that are used in the aerospace industry. The paper aims to discuss these issues.

Design/methodology/approach

The characteristics of aluminum nanoparticles slurry including oxidizer, oxidizer contents, abrasive contents, slurry flow rate, and polishing time on aluminum nanoparticles CMP performance, including material removal amount and surface morphology were studied.

Findings

Experimental results indicate that the CMP performance depends strongly on the oxidizer, oxidizer contents, and abrasive contents. Surface polished by slurries that contain nano-Al abrasives had a lower surface average roughness (Ra), lower topographical variations and less scratching. The material removal amount and the Ra were 124 and 7.61 nm with appropriate values of the process parameters of the oxidizer, oxidizer content, abrasive content, slurry flow rate and polishing time which were H2O2, 2 wt.%, 1 wt.%, 10 ml/min, 5 min, respectively.

Originality/value

Based on SEM determinations of the process parameters for the polishing of the surfaces, the CMP mechanism was deduced preliminarily.

Details

Industrial Lubrication and Tribology, vol. 66 no. 1
Type: Research Article
ISSN: 0036-8792

Keywords

Article
Publication date: 2 January 2007

Vandan Surve and Vijaya Puri

To study nonreciprocal effects in microstrip components due to ferrite thin film overlay.

Abstract

Purpose

To study nonreciprocal effects in microstrip components due to ferrite thin film overlay.

Design/methodology/approach

The possibility of obtaining non reciprocal characteristics in the X band microwave region in the absence of external magnetic field by a simple process of using Mg, Co, Zn ferrite thin films as in‐touch overlay over λ/2 microstrip rejection filter was investigated. Microstrip rejection filter is basically a reciprocal component. The ferrite thin films were deposited by electroless plating.

Findings

It was found that frequency, pH and ferrite overlay material dependent changes occurred and differences in forward and reverse loss also observed, in some cases greater than 30 dB. Owing to the overlay the rejection properties of the filter is lost and there is an increase in insertion loss. The best non reciprocal effects are seen at higher frequencies. The presence of permeability related effects like magnetostatic modes interfering with the normal propagation of the microstrip circuits might be causing the changes in the circuits.

Originality/value

There is scope for true planarisation of ferrite‐based components by using the ferrite in thin film form as in‐touch overlay.

Details

Microelectronics International, vol. 24 no. 1
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 1 January 1993

B. De Meulemeester, A. Van Calster, A. De Bruycker and K. Allaert

Since the first appearance of high density interconnection systems about ten years ago, researchers have tried to exploit this concept to the full. By introducing new technologies…

Abstract

Since the first appearance of high density interconnection systems about ten years ago, researchers have tried to exploit this concept to the full. By introducing new technologies and materials, they have succeeded in building a module that equals wafer scale integration (WSI) in speed and efficiency. However, MCMs have not yet experienced rapid growth and acceptance as a result of the large capital investment and rather small volumes involved. This paper sets out to show that MCMs can be fabricated using technology and processes already in existence at most conventional IC and thin‐film production facilities.

Details

Microelectronics International, vol. 10 no. 1
Type: Research Article
ISSN: 1356-5362

Content available
Article
Publication date: 1 September 2001

68

Abstract

Details

Work Study, vol. 50 no. 5
Type: Research Article
ISSN: 0043-8022

Article
Publication date: 8 February 2008

Manfred Suppa

The purpose of this paper is to present the materials and process considerations and solutions that enable the safe use of plugging pastes in high density interconnection (HDI…

Abstract

Purpose

The purpose of this paper is to present the materials and process considerations and solutions that enable the safe use of plugging pastes in high density interconnection (HDI) printed circuit boards (PCBs) designed to operate at higher temperatures.

Design/methodology/approach

The paper introduces the concept of microvia plugging and the issues that are important in influencing HDI PCB reliability. Plugging pastes and their properties are discussed along with the various plugging processes that can be used. The advantages and disadvantages of each type of process are compared and contrasted.

Findings

The creation of via holes and the filling of these interconnection holes or buried vias and their subsequent copper plating is one of the key processes in HDI technology. In future, the importance of plugging will increase, particularly on account of the growing demand for copper plating and dimensional stability.

Research limitations/implications

The paper highlights the importance of making the correct selection of materials and processing methodologies and details the implications of these choices.

Originality/value

The paper describes the different approaches that can be used for filling microvias and details the issues, advantages and disadvantages of the various approaches. The paper particularly focuses on the special demands on plugging pastes used in higher temperature range applications.

Details

Circuit World, vol. 34 no. 1
Type: Research Article
ISSN: 0305-6120

Keywords

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