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The purpose of this paper is to fill the knowledge gap in the microscopic origin of high corrosion resistance in the passivated 316 L stainless steel.

Here, the pitting corrosion potential of the passivated 316 L stainless steel is measured, as well as the non-passivated one. Using the aberration-corrected scanning transmission electron microscopy, the microstructure of the passive film is unambiguously revealed. Combining the electron energy loss spectroscopy with the X-ray photoelectron spectroscopy, the depth profiling analysis is conducted and the variations in composition from the very surface of the passive film to the internal steel are clarified.

By optimizing the passivation treatment process, the authors significantly increase the pitting corrosion potential of the passivated 316 L stainless steel by 300 mV, compared with the non-passivated one. The passive film features a unique amorphous multilayer structure. On the basis of the depth profiling analysis, the origin of the high corrosion resistance achieved is unraveled, in which the redistribution of elements in the multilayer passive film, especially the enrichment of Cr in the topmost layer and Ni at the film-metal interface, prevent the oxidization of the inner iron of the steel.

This study advances understanding of the nature of the passive film from a microscopic view, which can be helpful for the further improvement of the corrosion resistance performance.

This study introduces a model for the multilayer structure of passive films that reveals the reconstitution of the passive films after the opportune passivation treatments. Due to the redistribution of elements caused by passivation, the enrichment of Cr in the outer layer and Ni near the film-metal interface leads to enhance corrosion resistance performance.

Embedded passives account for a very large part of today's electronic assemblies. This is particularly true for products such as cellular phones, camcorders, computers, and several critical defence devices. Market pressures for new products with more features, smaller size and lower cost demand smaller, compacter, simpler substrates. An obvious strategy is to reduce the number of surface mounted passives by embedding them in the substrate. In addition, current interconnect technology to accommodate surface mounted passives imposes certain limits on board design which constrain the overall system speed. Embedding passives is one way to minimize the functional footprint while at the same time improving performance. The purpose of this paper is to describe the development of a thin film technology based on ferroelectric‐epoxy polymer‐based flake‐free resin coated copper capacitive (RC3) nanocomposites to manufacture multilayer embedded capacitors.

This paper discusses thin film technology based on RC3 nanocomposites. In particular, recent developments in high capacitance, large area, thin film passives, and their integration in system in a package (SiP) are highlighted.

A variety of RC3 nanocomposite thin films ranging from 8 to 50 microns thick were processed on copper substrates by liquid coating. Multilayer embedded capacitors resulted in high capacitances of 16‐28 nF. The fabricated test vehicle also included two embedded resistor layers with resistances in the range of 15 Ω to 100 kΩ. To enable high performance devices, an embedded resistor must meet certain tolerances. The embedded resistors can be laser trimmed to a tolerance of <5 percent, which is usually acceptable for most applications. An extended embedded passives solution has been demonstrated, both through its high wireability designs and package performance, to be perfectly suited for SiP applications.

This case study designed and fabricated an eight layer high density internal passive core and subsequently applied fine geometry three buildup layers to form a 3‐8‐3 structure. The passive core technology is capable of providing up to six layers of embedded capacitance and could be extended further.

A thin film technology based on ferroelectric‐epoxy polymer‐based flake‐free RC3 nanocomposites was developed to manufacture multilayer embedded capacitors. The overall approach lends itself to package miniaturization because capacitance can be increased through multiple layers and reduced thickness to give the desired values in a smaller area.

On 20 April ISHM‐Benelux held its 1988 Spring meeting at the Grand Hotel Heerlen. This meeting was totally devoted to implantable devices, in particular to the technologies used for these high reliability, extremely demanding devices. For this meeting ISHM‐Benelux was the guest of the Kerkrade facility of Medtronic. Medtronic (headquartered in Minneapolis, USA) is the world's leading manufacturer of implantable electronic devices. Apart from the assembly of pacemakers and heart‐wires, the Kerkrade facility acts as a manufacturing technology centre for Medtronic's European facilities.

Diffusion patterning is a dielectric patterning technology, which is used in the screen printed thick film technology for higher density multilayer circuits. This technology is suitable for producing lower cost multichip modules and requires a low additional investment in conventional thick film technology production lines. Comparisons of via resolution capability of diffusion patterning versus conventional thick film technology are described and discussed. Preliminary experimental results obtained with a test circuit showed that 200μm lines and 200μm vias could be achieved with acceptable yield and with minimal modification to standard production lines. The electronic circuit for the pressure sensor was designed and realised with the verified technology as a low‐cost ceramic multichip module. A few results of an investigation of some thick film materials, which comprise the “set” of pastes for diffusion patterning technology, are presented.

Multilayer aircore inductors fabricated in a range of interconnection technologies which are MCM compatible are presented and compared. These consist of thick‐film, low temperature cofired ceramic (LTCC), printed circuit board (PCB) and fine‐line plated copper on ceramic (copper plating). From a comparison of simulated and measured results, it can be concluded that a predictive design capability has been achieved for inductance and self‐resonant frequency (SRF). Modelling of AC resistance and Q requires further investigation.

This paper aims to fabricate and characterize ZnO-based multilayer varistors.

Tape casting technique was utilized for preparation of multilayer varistors based on ZnO doped with Pr, Bi, Sb, Co, Cr, Mn and Si oxides. Scanning electron microscope (SEM), energy-dispersive X-ray spectroscopy (EDS) and X-ray diffraction (XRD) methods were used to study the microstructure, elemental and phase compositions, respectively, of the varistors. Dielectric properties were investigated by impedance spectroscopy. Current–voltage (I–U) dependences were measured to characterize nonlinear behavior of the fabricated varistors.

XRD, SEM and EDS studies revealed dense microstructure of ceramic layers with ZnO grains sized 1-4 μm surrounded by nanometric Bi-rich films, submicrometer Zn₇Sb₂O₁₂ spinel grains and needle-shaped Pr₃SbO₇ crystallites. Praseodymium oxide was found to be very effective as an additive restricting the ZnO grain growth. I–U characteristics of the fabricated multilayer varistors were nonlinear, with the nonlinearity coefficients of 23-27 and 19-51 for the lower and higher Pr₂O₃ content, respectively. The breakdown voltages were 60-150 V, decreasing with increasing sintering temperature.

Low-temperature cofired ceramics technology enables attaining a significant progress in miniaturization of electronic passive components. Literature concerning application of this technology for multilayer varistors fabrication is limited. In the present work, the results of XRD, SEM and EDS studies along with the I–U and complex impedance dependences are analyzed to elucidate the origin of the observed varistor effect. The influence of sintering temperature and Pr₂O₃-doping level was investigated.

Recent progress in the investigation of the material parameters of Al/Al₂O₃systems leads to an increase in the possibilities for using embedded TaO_XN_1‐X layers. The use of Al‐sheets as mechanical strength carriers in combination with vacuum‐deposited Al‐layers and electrochemically anodized Al₂O₃ structure requires study. This was found to create a periodic multilayer Al/Al₂O₃ structure. The material qualities of this system allow optimization in order to achieve high speed data processing and signal propagation. The existing studies using Al and Ta combination as well as the high resistance qualities of the modified TaO_XN_1‐X layers have shown satisfactory results. It can be concluded that the development of this new layer combination is possible in the multilayer carrier structures. Some preliminary research studies show a proper adhesion and satisfactory characteristics of the two integrated resistive planes in the multilayer combination Al/Al₂O₃//TaO_XN_1‐X/Ta₂O₅/Al.

Material formulation, structuring and modification are key to increasing the unit volume complexity and density of next generation electronic packaging products. Laser processing is finding an increasing number of applications in the fabrication of these advanced microelectronic devices. The purpose of this paper is to discuss the development of new laser‐processing capabilities involving the synthesis and optimization of materials for tunable device applications.

The paper focuses on the application of laser processing to two specific material areas, namely thin films and nanocomposite films. The examples include BaTiO₃‐based thin films and BaTiO₃ polymer‐based nanocomposites.

A variety of new regular and random 3D surface patterns are highlighted. A frequency‐tripled Nd:YAG laser operating at a wavelength of 355 nm is used for the micromachining study. The micromachining is used to make various patterned surface morphologies. Depending on the laser fluence used, one can form a “wavy,” random 3D structure, or an array of regular 3D patterns. Furthermore, the laser was used to generate free‐standing nano and micro particles from thin film surfaces. In the case of BaTiO₃ polymer‐based nanocomposites, micromachining is used to generate arrays of variable‐thickness capacitors. The resultant thickness of the capacitors depends on the number of laser pulses applied. Micromachining is also used to make long, deep, multiple channels in capacitance layers. When these channels are filled with metal, the spacings between two metallized channels acted as individual vertical capacitors, and parallel connection eventually produce vertical multilayer capacitors. For a given volume of capacitor material, theoretical capacitance calculations are made for variable channel widths and spacings. For comparison, calculations are also made for a “normal” capacitor, that is, a horizontal capacitor having a single pair of electrodes.

This technique can be used to prepare capacitors of various thicknesses from the same capacitance layer, and ultimately can produce variable capacitance density, or a library of capacitors. The process is also capable of making vertical 3D multilayer embedded capacitors from a single capacitance layer. The capacitance benefit of the vertical multilayer capacitors is more pronounced for thicker capacitance layers. The application of a laser processing approach can greatly enhance the utility and optimization of new materials and the devices formed from them.

Laser micromaching technology is developed to fabricate several new structures. It is possible to synthesize nano and micro particles from thin film surfaces. Laser micromachining can produce a variety of random, as well as regular, 3D patterns. As the demand grows for complex multifunctional embedded components for advanced organic packaging, laser micromachining will continue to provide unique opportunities.

In this paper, Substrate Integrated Packaging (SIP) based on thin film multilayer technology is presented. Coplanar waveguide feedthroughs calculated with 3D‐Finite Differential Methods were manufactured using a ceramic or silicon carrier, gold conductors and polyimide as dielectric. The substrate integrated packages were realized with metallic frames and lids mounted on the thin film circuitry. S‐parameter measurements show the superior quality of the feedthroughs. To verify the new packaging concept, a 10GHz and a 58GHz amplifier module were realized. From these modules the potential of the SIP‐technology is demonstrated.

In this paper we present recent studies on the electrochemical migration processes in Ag thin film parallel microstrip lines in MCM(D) structures. The basic concept is applying accelerated local drop‐test of water solutions onto the surface of two adjacent lines, under a given voltage potential. These operational conditions are often met in the interconnection line buses, placed in the top assembly level of multilayered hybrid structures. The subject of investigations are MCM(D) developed on Al‐sheet carrier with internal conducting and isolating layers, produced through unique selective electrochemical anodization of Al and Ta. This technology process also enables the creation of embedded R and C passive components on the base of TaO_xN_1‐x and Ta₂O₅ (or Al₂O₃) respectively. We propose an electrochemical deposition of Ag/Sb alloys on the surface of Al interconnection lines and contact pads to ease the bondability and solderability in chip mounting procedures. The artificially created silver migrated defects and partial shorts are investigated through the high frequency method of coupled transmission lines in order to eliminate the errors and insufficient validity of DC direct measurements.