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Reviews some of the more important technologies used for fabricating microcomponents and systems – bulk silicon micromachining, surface micromachining and LIGA, a process for forming deep microstructures by lithography, electroforming and moulding. Discusses the relative merits of using synchroton, electron beam and excimer laser irradiation. Gives a comb actuator and an electrostatic motor as examples of micromachined components.

The purpose of this study is to design and characterize the dielectrophoretic (DEP) microelectrodes with various array structure arrangements in order to produce optimum non-uniform electric field for particle capture. The DEP-electrodes with 2D electrode structure was fabricated and characterized to see the effect of electrode structure configuration on the capture capability of the cells suspending in the solution.

The presented microelectrode array structures are made of planar conductive metal structure having same size and geometry. Dielectrophoretic force (F_DEP) generated in the fluidic medium is initially simulated using COMSOL Multi-physics performed on two microelectrodes poles, which is then continued on three-pole microelectrodes. The proposed design is fabricated using standard MEMS fabrication process. Furthermore, the effect of different sinusoidal signals of 5, 10 and 15 volt peak to peak voltage (V_pp) at fixed frequency of 1.5 MHz on capturing efficiency of microelectrodes were also investigated using graphite metalloids particles as the suspended particles in the medium. The graphite particles that are captured at the microelectrode edges are characterized over a given time period.

Based on analysis, the capturing efficiency of microelectrodes at the microelectrode edges is increased as voltage input increases, confirming its dependency to the F_DEP strength and direction of non-uniform electric field. This dependency to field consequently increases the surface area of the accumulated graphite. It is also showed that the minimum ratio of the surface accumulated area of captured graphite is 1, 2.75 and 9 μm2 for 5, 10 and 15 V_pp, respectively. The simulation result also indicates a significant improvement on the performance of microelectrodes by implementing third pole in the design. The third pole effect the particles in the medium by creating stronger non-uniform electric field as well as more selective force toward the microelectrodes’ edges.

The microelectrode array arrangement is found as a reliable method to increase the strength and selectivity of non-uniform electric field distribution that affect F_DEP. The presented findings are verified through experimental test and simulation results.

Sensors engineered on silicon chips have tremendous development potential and are attracting considerable attention in the USA and Japan. By contrast British research and development activities in this area have been weak, even compared with the work at other centres in Europe. BNF‐Fulmer has already completed construction of a clean room with a range of processing equipment and, in expanding its Microengineering Centre for contract and joint R&D projects with other companies, the organization is hoping to put the UK in the lead of European work, filling a vital gap between university research and the large microelectronics silicon foundries.

This paper aims to analyze the effect of Au wire size and location of hook during wire pulling test to identify the variation of results obtained.

Two hook locations, namely, location A and location B were used to analyze the effect of hook location. Location A was the same as the hook location required by MIL-STD-883E standard, whereas location B was located near to the second bond. The correlation between new purposed failure modes and MIL-STD-883E standard was developed to reflect on the pull strength with the physical failure.

It was observed that fine pitch Au wire has higher variation and lower process capability of pull strength. Au wire pulled by the hook at location B provides a more representative result compared to that at location A. Fifty per cent or more of Au remnant is required to be considered as a good and reliable Au wedge bond based on the new purposed failure modes.

The evaluation of gold (Au) wedge bond requires a new proper wire pulling test method. This is due to the large variation obtained from the application of current practice of wire pulling test.

The purpose of this paper is to discuss the fabrication technology and test of thermo-pneumatic actuator utilizing Si₃N₄-polyimide thin film membrane. Thin film polyimide membrane capped with Si₃N₄ thin layer is used as actuator membrane which is able to deform through thermal forces inside an isolated chamber. The fabricated membrane will be suitable for thermo-pneumatic-based membrane actuation for lab-on-chip application.

The actuator device consisting of a micro-heater, a Si-based micro-chamber and a heat-sensitive square-shaped membrane is fabricated using surface and bulk-micromachining process, with an additional adhesive bonding process. The polyimide membrane is capped with a thin silicon nitride layer that is fabricated by using etch stop technique and spin coating.

The deformation property of the membrane depend on the volumetric expansion of air particles in the heat chamber as a result of temperature increase generated from the micro-heater inside the chamber. Preliminary testing showed that the fabricated micro-heater has the capability to generate heat in the chamber with a temperature increase of 18.8 °C/min. Analysis on membrane deflection against temperature increase showed that heat-sensitive thin polyimide membrane can perform the deflection up to 65 μm for a temperature increase of 57°C.

The dual layer polyimide capped with Si₃N₄ was used as the membrane material. The nitride layer allowed the polyimide membrane for working at extreme heat condition. The process technique is simple implementing standard micro-electro-mechanical systems process.

Reviews the Transducers 2001/EUROSENSORS XV conferences that were held in Munich, 10‐14 June 2001. Microengineering figured prominently in the programme, almost half the sessions covering aspects of this subject, including power generation, packaging and wafer bonding, physical effects, machining and etching (also for high aspect ratio), micro‐thrusters, ‐jets, ‐pumps, ‐valves, ‐fluidics, ‐probes, optical 3D and RF MEMS, resonators, polymer based microsystems and commercialisation. Explicit sensor sessions included materials for gas sensing, chemical and gas sensors, biomedical systems, electrochemical sensors, inertial sensors, magnetic sensors, image, flow and thermal sensors. There were two sessions on actuators. Nano‐devices (physical in character) were covered in one session, though nanotechnology as such did not figure in the proceedings.

The Microengineering Laboratory of the Swiss Federal Institute of Technology(EPFL), situated on the outskirts of Lausanne has over eight years of robot research experience. It has studied some of the basic problems of configuration, control, drive systems, etc. and many solutions are now finding their way into industry. Brian Rooks recently visited the Laboratory.

This paper aims to investigate the characteristics of ultra-fine lead-free solder joints reinforced with TiO₂ nanoparticles in an electronic assembly.

This study focused on the microstructure and quality of solder joints. Various percentages of TiO₂ nanoparticles were mixed with a lead-free Sn-3.5Ag-0.7Cu solder paste. This new form of nano-reinforced lead-free solder paste was used to assemble a miniature package consisting of an ultra-fine capacitor on a printed circuit board by means of a reflow soldering process. The microstructure and the fillet height were investigated using a focused ion beam, a high-resolution transmission electron microscope system equipped with an energy dispersive X-ray spectrometer (EDS), and a field emission scanning electron microscope coupled with an EDS and X-ray diffraction machine.

The experimental results revealed that the intermetallic compound with the lowest thickness was produced by the nano-reinforced solder with a TiO₂ content of 0.05 Wt.%. Increasing the TiO₂ content to 0.15 Wt.% led to an improvement in the fillet height. The characteristics of the solder joint fulfilled the reliability requirements of the IPC standards.

This study provides engineers with a profound understanding of the characteristics of ultra-fine nano-reinforced solder joint packages in the microelectronics industry.

The findings are expected to provide proper guidelines and references with regard to the manufacture of miniaturized electronic packages. This study also explored the effects of TiO₂ on the microstructure and the fillet height of ultra-fine capacitors.

This paper aims to present the capacitance characterization of tapered dielectrophoresis (DEP) microelectrodes as micro-electro-mechanical system sensor and actuator device. The application of DEP-on-a-chip (DOC) can be used to evaluate and correlate the capacitive sensing measurement at an actual position and end station of liquid suspended targeted particles by DEP force actuator manipulation.

The capability of both, sensing and manipulation was analysed based on capacitance changes corresponding to the particle positioning and stationing of the targeted particles at regions of interest. The mechanisms of DEP sensor and actuator, designed in DOC applications were energized by electric field of tapered DEP microelectrodes. The actual DEP forces behaviour has been also studied via quantitative analysis of capacitance measurement value and its correlation with qualitative analysis of positioning and stationing of targeted particles.

The significance of the present work is the ability of using tapered DEP microelectrodes in a closed mode system to simultaneously sense and vary the magnitude of manipulation.

The integration of DOC platform for contactless electrical-driven with selective detection and rapid manipulation can provide better efficiency in in situ selective biosensors or bio-detection and rapid bio-manipulation for DOC diagnostic and prognostic devices.

The purpose of this paper is to analyse the operation of p-type side gate junctionless silicon transistor (SGJLT) in accumulation region through experimental measurements and 3-D TCAD simulation results. The variation of electric field components, carrier’s concentration and valence band edge energy towards the accumulation region is explored with the aim of finding the origin of SGJLT performance in the accumulation operational condition.

The device is fabricated by atomic force microscopy nanolithography on silicon-on-insulator wafer. The output and transfer characteristics of the device are obtained using 3-D Technology Computer Aided Design (TCAD) Sentaurus software and compared with experimental measurement results. The advantages of AFM nanolithography in contact mode and Silicon on Insulator (SOI) technology were implemented to fabricate a simple structure which exhibits the behaviour of field effect transistors. The device has 200-nm channel length, 100-nm gate gap and 4 μm for the distance between the source and drain contacts. The characteristics of the fabricated device were measured using an Agilent HP4156C semiconductor parameter analyzer (SPA). A 3-D TCAD Sentaurus tool is used as the simulation platform. The Boltzmann statistics is adopted because of the low doping concentration of the channel. Hydrodynamic model is taken to be as the main transport model for all simulations, and the quantum mechanical effects are ignored. A doping dependent Masetti mobility model was also included as well as an electric field dependent model with Shockley–Read–Hall (SRH) carrier recombination/generation.

We have obtained that the device is a normally on state device mainly because of the lack of work functional difference between the gate and the channel. Analysis of electric field components’ variation, carrier’s concentration and valence band edge energy reveals that increasing the negative gate voltage drives the device into accumulation region; however, it is unable to increase the drain current significantly. The positive slope of the hole quasi-Fermi level in the accumulation region presents mechanism of carriers’ movement from source to drain. The influence of electric field because of drain and gate voltage on charge distribution explains a low increasing of the drain current when the device operates in accumulation regime.

The proposed side gate junctionless transistors simplify the fabrication process, because of the lack of gate oxide and physical junctions, and implement the atomic force microscopy nanolithography for fabrication process. The optimized structure with lower gap between gate and channel and narrower channel would present the output characteristics near the ideal transistors for next generation of scaled-down devices in both accumulation and depletion region. The presented findings are verified through experimental measurements and simulation results.