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Article
Publication date: 1 December 2000

67

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Circuit World, vol. 26 no. 4
Type: Research Article
ISSN: 0305-6120

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Article
Publication date: 1 February 1994

M.G. Sage and D.R. Gross

This paper looks at the progress taking place in packaging and assembly, with particular emphasis on the introduction of three‐dimensional IC technology. The progression from DIP…

Abstract

This paper looks at the progress taking place in packaging and assembly, with particular emphasis on the introduction of three‐dimensional IC technology. The progression from DIP to SMT and then MCM is seen as a natural one with a further progression to 3‐dimensional packaging already under way. The interdependence of device, process and packaging technology is analysed and examples of 3‐dimensional packaging are discussed.

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Microelectronics International, vol. 11 no. 2
Type: Research Article
ISSN: 1356-5362

Article
Publication date: 1 December 1996

S. Larcombe and P. Ivey

This research demonstrates how a low‐cost three‐dimensional packaging technology can be ultilised to implement heterogeneous microsystems. Systems which integrate sensors…

67

Abstract

This research demonstrates how a low‐cost three‐dimensional packaging technology can be ultilised to implement heterogeneous microsystems. Systems which integrate sensors, actuators and signal processing are highly complex and often require custom packaging to maximise their potential. Using a novel multichip module packaging technology, referred to as MCM‐V (multichip module‐vertical), it has been demonstrated that three‐dimensional MCMs can be applied in the production of high‐density microsystems incorporating sensors, bare die and discrete components. As an example, a microsystem which integrates an image sensor and programmable processing resources is described. The microsystem represents the first heterogeneous system to be produced using the advanced three‐dimensional technology (MCM‐V).

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Microelectronics International, vol. 13 no. 3
Type: Research Article
ISSN: 1356-5362

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Content available
Article
Publication date: 20 March 2009

56

Abstract

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Pigment & Resin Technology, vol. 38 no. 2
Type: Research Article
ISSN: 0369-9420

Article
Publication date: 1 January 1993

J. Chang and C. Spooner

This paper will review rework of multi‐chip modules (MCMs). The issues of die removal from substrates (i.e., PCBs) with different chip‐to‐substrate interconnect technologies will…

Abstract

This paper will review rework of multi‐chip modules (MCMs). The issues of die removal from substrates (i.e., PCBs) with different chip‐to‐substrate interconnect technologies will be explored in detail. These different interconnect technologies (e.g., wire bonding, tape automated bonding and flip chip bonding) and die‐attachment methods (e.g., eutectic and adhesive) have a strong influence on the MCM rework process and equipment selection. Traditional surface mount (SM) and current MCM rework technologies are also compared. It will be shown that traditional SMT rework processes and equipment are unable to solve the level of difficulty involved in fine‐pitch MCM device removal—especially for systems which require heat removal through the substrate.

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Circuit World, vol. 19 no. 2
Type: Research Article
ISSN: 0305-6120

Content available
Article
Publication date: 1 March 2000

95

Abstract

Details

Circuit World, vol. 26 no. 1
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 1 February 1995

R. Fillion, R. Wojnarowski, T. Gorcyzca, E. Wildi and H. Cole

An innovative embedded chip MCM technology is being developed to address the packaging needs of the high volume, non‐military electronics industries. This development has evolved…

Abstract

An innovative embedded chip MCM technology is being developed to address the packaging needs of the high volume, non‐military electronics industries. This development has evolved out of the GE High Density Interconnect (HDI) embedded chip MCM technology that was aimed at very high performance electronics in harsh military environments. In the HDI process, multiple bare chips are placed into cavities formed in a ceramic substrate and interconnected using an overlay polymer film, thin film metallisation and laser formed vias. Multiple levels of fine line (20 to 40 microns) interconnections and reference planes are used to form the circuit. In this new process, a plastic encapsulated substrate is formed by moulding a polymer resin around the bare die after placement on to a flat polymer film pre‐coated with an adhesive layer. After curing of the resin, the circuit is formed by patterning via holes through the polymer film to the components, metallising the polymer film and patterning the metal into the desired interconnect pattern. Feature sizes are readily scaled to the complexity needed by the circuit, permitting the use of lower cost and higher yield board photopatterning processes and equipment. This paper will cover the development of this low cost technology and will describe the process. It will also describe the thermal, mechanical and electrical features of this process and show actual working prototype modules.

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Circuit World, vol. 21 no. 2
Type: Research Article
ISSN: 0305-6120

Article
Publication date: 1 January 1994

Miloš Somora, A.P. Hilley, H. Binner, Gábor Hársanyi, M.S. Vijayaraghavan, Tao Sung Oh, T. Laine‐ Ylijoki, P. Collander, Boguslaw Herod, Peter Barnwell and David Lowrie

‘Soldering and Cleaning in Electronics’ international conference, including an exposition, took place in Brno on 12–13 October 1993. The conference was organised by SMT‐Info…

422

Abstract

‘Soldering and Cleaning in Electronics’ international conference, including an exposition, took place in Brno on 12–13 October 1993. The conference was organised by SMT‐Info, together with the ISHM‐Czech and Slovak Chapter. The purpose of this common action was to bring together the professionals in surface mount technology and thick film technology. In the framework of the conference, in which 130 home and foreign delegates participated, the annual meeting of the ISHM‐Czech and Slovak Chapter took place.

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Microelectronics International, vol. 11 no. 1
Type: Research Article
ISSN: 1356-5362

Article
Publication date: 1 January 1990

M.G. Sage

Existing IC packaging and interconnection is creating a barrier for advances taking place in IC technology. Wafer scale integration (WSI) is being proposed as the next major step…

Abstract

Existing IC packaging and interconnection is creating a barrier for advances taking place in IC technology. Wafer scale integration (WSI) is being proposed as the next major step in electronics, bringing with it the removal of a large number of these barriers. However, there are still major problems with WSI technology that are unlikely to be solved before the late nineties. In the meantime a new packaging and interconnection technology will be introduced—the multichip module (MCM), which will act as a hybrid for WSI. The MCM will not make the PCB obsolete, though it will pose threats and opportunities to important parts of the thick film hybrid industry. The MCM, for the purposes of this paper, is defined as a thin film multilayer interconnect structure utilising IC manufacturing type processes. MCM technology is not confined to high performance systems; it will be used across the whole of the electronics industry including the consumer sector, with a circuitised substrate world market of nearly $7 bn by 1997.

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Microelectronics International, vol. 7 no. 1
Type: Research Article
ISSN: 1356-5362

Article
Publication date: 1 August 1996

A.T. Singer

In thecourse of technology development, decisions must be made about the nature of future progress. To aidin this decision‐making process, Technical Cost Modelling has evolved…

133

Abstract

In the course of technology development, decisions must be made about the nature of future progress. To aid in this decision‐making process, Technical Cost Modelling has evolved from traditional cost modelling methodologies in order to accurately predict the dynamics of a system of manufacture. As an example of the utility of this methodology, a new MCM technology has been chosen for cost analysis: deposited dielectric on laminate (MCM‐D/L) electronic packages. For this illustration, the cost drivers are determined and cost/performance trade‐offs with MCM‐D and MCM‐L analysed. With this disciplined approach to cost prediction, technology development cost issues can be decided thoroughly yet fairly quickly.

Details

Circuit World, vol. 22 no. 2
Type: Research Article
ISSN: 0305-6120

Keywords

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