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Article
Publication date: 1 May 2006

Michael Pecht and Dave Humphrey

The paper presents an alternative solution to address part obsolescence. This paper discusses approaches to solve part obsolescence including an uprating approach. This paper also…

2110

Abstract

Purpose

The paper presents an alternative solution to address part obsolescence. This paper discusses approaches to solve part obsolescence including an uprating approach. This paper also describes the methods to uprate parts, and demonstrates the practical application of the uprating approach in the form of a case study.

Design/methodology/approach

This paper has been written to provide an understanding of the uprating approach to mitigate the problems caused by part obsolescence. The paper discusses the challenge faced due to part obsolescence, the temperature ratings for electronic parts, the uprating methods and finally explains the use of uprating to mitigate part obsolescence in the form of a case study. The part being uprated is a microcontroller unit used in many avionics applications. The case study describes a particular use of uprating and the return on investment.

Findings

Based on the uprating approach, it was discovered that for the particular application, the commercially available plastic quad flat pack microcontroller could be used as a substitute for the “military” ceramic BGA version, which was discontinued by the manufacturer. It was discovered that there would be no problem with the commercial part's quality or reliability for the particular application. Parametric tests showed no evidence of instability of electrical characteristics over the uprated temperature range. There was substantial return on investment due to the use of uprated parts.

Practical implications

This paper can help electronics manufactures deal with part obsolescence. This paper demonstrates the practicality of uprating parts. Uprating can save companies money by reducing the need for life‐time buys, substitution of parts and even redesign.

Originality/value

The paper provides an alternative approach to address the problem of part obsolescence. This paper shows that proper uprating leads to cost saving while continuing to provide reliable service.

Details

Microelectronics International, vol. 23 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 28 August 2007

Lei Nie, Michael H. Azarian, Mohammadreza Keimasi and Michael Pecht

This paper seeks to present a prognostics approach using the Mahalanobis distance (MD) method to predict the reliability of multilayer ceramic capacitors (MLCCs) in…

Abstract

Purpose

This paper seeks to present a prognostics approach using the Mahalanobis distance (MD) method to predict the reliability of multilayer ceramic capacitors (MLCCs) in temperature‐humidity‐bias (THB) conditions.

Design/methodology/approach

Data collected during THB testing of 96 MLCCs were analyzed using the MD method. In the THB tests, three parameters (capacitance (C), dissipation factor (DF), and insulation resistance (IR)) were monitored in situ. A Mahalanobis space (MS) was formed from the MD values of a set of non‐failed MLCCs. MD values for the remaining MLCCs were compared with an MD threshold. Data for MLCCs which exceeded the threshold were examined using the failure criteria for the individual electrical parameters to identify failures and precursors to failure.

Findings

It was found that the MD method provided an ability to detect failures of the capacitors and identify precursors to failure, although the detection rate was not perfect.

Research limitations/implications

It was observed that the quality and construction of the MS, together with the choice of the MD threshold, were the critical factors determining the sensitivity of the MD method. Recommendations are offered for improved sensitivity to enable assessment of intermittent failures.

Originality/value

MD analysis of the multivariate MLCC data set illustrates how detection of failures can be simplified in a system for which several parameters were monitored simultaneously. This makes the MD method of great potential value in a health‐monitoring system.

Details

Circuit World, vol. 33 no. 3
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 1 December 1998

M. Dube, T.J. Dishongh, K.E. Beatty and M. Pecht

Temperature measurements using thermocouples are made at several locations on J‐leaded plastic quad‐flat packs and printed wiring boards during the reflow soldering process. Both…

162

Abstract

Temperature measurements using thermocouples are made at several locations on J‐leaded plastic quad‐flat packs and printed wiring boards during the reflow soldering process. Both moisture saturated and dry packages are studied, with little difference found in the measured temperature on the package surfaces. The temperature at the component lead is found to be a good approximation to the temperatures observed near the die. This provides an externally measurable parameter to assess delamination and popcorning.

Details

Circuit World, vol. 24 no. 4
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 13 February 2007

Tong Fang, Sony Mathew, Michael Osterman and Michael Pecht

This paper aims to present a methodology for estimating the risk of component level electrical bridging failures from unattached conductive (tin) whiskers.

Abstract

Purpose

This paper aims to present a methodology for estimating the risk of component level electrical bridging failures from unattached conductive (tin) whiskers.

Design/methodology/approach

Based on experimental data an algorithm was developed and assessed by further experiments. The risk estimate is based on whisker parameters, generated from experiments over a period of time. A bridging failure risk is defined as the probability of a conductive whisker landing between two isolated electrical conductors. A probabilistic estimate for electrical bridging failure risk is achieved by randomly sampling distributions of conductive whisker length, deposition angle, and density for a defined electrical structure. A fine pitch quad flat package attached to a printed wiring board is used as test vehicle to verify the risk estimate.

Findings

The estimated risk is found to be higher than planned in the experimental test. The lower experimentally determined risk was found to be the result of high contact resistance between the conductive whisker and the electrical conductors that form the unintended circuit. Contact resistance between the whisker and electrical conductors was found to mitigate the whisker shorting risk.

Originality/value

This is the first attempt to quantify the risk failure due to unattached conductive whiskers in electronic products. A methodology for estimating electrical bridging risk due to unattached conductive whiskers is provided. Contact resistance of conductive whiskers is found to be a critical issue that may be mitigate failure risks.

Details

Circuit World, vol. 33 no. 1
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 1 December 1997

M. Pecht, Y. Ranade and J. Pecht

This paper presents a study to determine the extent to which delamination at the die to encapsulantinterface affects the package moisture content, and electrical failures when…

282

Abstract

This paper presents a study to determine the extent to which delamination at the die to encapsulant interface affects the package moisture content, and electrical failures when subjected to unbiased temperature‐humidity testing. Moisture absorption experiments showed that the presence of delamination did not significantly after the measurable moisture absorption characteristics of packages. Reliability testing indicated that although delamination is generally thought of as a reliability risk, it may not be a sufficient condition to promote damage in packages under dormant storage conditions. Experimental results showed no parametric or functional failures (or visible degradation) in packages with 100% die surface delamination after 1000 hours of unbiased testing at 140°C/85%RH.

Details

Circuit World, vol. 23 no. 4
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 1 June 2004

Richard Ciocci and Michael Pecht

Eliminating lead in electronics is an environmentally considerate approach that is made prior to manufacture. Recently enacted legislation encourages increased recycling of…

474

Abstract

Eliminating lead in electronics is an environmentally considerate approach that is made prior to manufacture. Recently enacted legislation encourages increased recycling of electrical and electronic products. However, recycling is typically an end‐of‐use action occurring just before final disposal. From an environmentally‐considerate perspective, lead elimination or replacement is a better approach. Short of having a definitive study to follow, industry, regulators, and consumers are proceeding with the change. Various lead‐free alloys have been tested and used for electronic components and assemblies. There are many replacements for eutectic tin‐lead solder, and alloys containing tin, silver, copper, and bismuth have been used successfully. Assessing how the electronics industry is addressing the change to lead‐free materials and processes requires answers to various questions. These questions regard the effects of changes to electronic products and their processes. What drives lead‐free migration, how processes can develop, and when products will be available are issues which define the assessment.

Details

Circuit World, vol. 30 no. 2
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 22 May 2007

Lei Nie, Michael Pecht and Richard Ciocci

This paper seeks to investigate the electronics industry's reaction to environmental regulations specifically in terms of lead‐free solders and halogen‐free flame‐retardants (FRs).

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Abstract

Purpose

This paper seeks to investigate the electronics industry's reaction to environmental regulations specifically in terms of lead‐free solders and halogen‐free flame‐retardants (FRs).

Design/methodology/approach

This work achieves its objective by discussing the various international environmental regulations pertaining to electronics manufacturing and relating the industry reactions to those regulations. It also provides the market trends related to lead‐ and halogen‐free products. The electronics industry is pursuing lead‐free solders and halogen‐free FRs, in part due to regulations. However, the paper includes examples of how the industry is successful in implementing environmentally friendly changes.

Findings

The authors compared regulations from Japan, the European Union, the USA, and China. While the regulations themselves vary in scope, industry actions to find alternatives do have common purposes. Electronics manufacturers recognize that environmentally motivated changes are beneficial in terms of waste minimization.

Research limitations/implications

Electronics manufacturers that are interested in green design will benefit from understanding present regulations. They will also benefit from the included examples of product and process improvement for the purpose of environmental compatibility.

Originality/value

This paper derives its perspective from a similar review of literature and company findings that the authors completed in 2006. As refinement of the regulations has continued, the electronics industry has developed improvements in basic materials and processes.

Details

Circuit World, vol. 33 no. 2
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 1 September 2006

Tong Fang, Michael Osterman, Sony Mathew and Michael Pecht

To present a methodology, including the algorithms, to quantify the risk of failure from tin whiskers and to present a dynamic risk trend based on the distribution of each of the…

Abstract

Purpose

To present a methodology, including the algorithms, to quantify the risk of failure from tin whiskers and to present a dynamic risk trend based on the distribution of each of the whisker growth parameters, generated from experiments over a period of time. This paper also aims to demonstrate the practical application of the methodology developed.

Design/methodology/approach

This paper has been written to provide a methodology to assess tin whisker risk due to fixed whiskers in electronic products. The risk assessment process has been detailed in the paper. To demonstrate the usefulness of the methodology, a tin whisker risk assessment was conducted for a printed circuit board (PCB) in operation.

Findings

Based on the experimental tin whisker growth data it is observed that growth rates of mean length and average density decrease with time. Based on the risk assessment, it was estimated that for the common matte tin over copper finish, the failure risk for the circuit card assembly was 4 per cent over 20 years. It was recommended that, for this product, components with bright tin lead finish should not be used. It was also found that the effectiveness of the conformal coating on this PCB is limited by the relative risk of the components on the board.

Originality/value

The paper provides a new methodology to assess fixed tin whisker risk in electronic products. The methodology provides a dynamic risk trend with time because the algorithm incorporates distributional data of whisker growth and the distributional data as a function of time. This type of assessment was lacking in the previous studies.

Details

Circuit World, vol. 32 no. 3
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 23 August 2011

Bhanu Sood, Michael Osterman and Michael Pecht

This paper aims to present the results of physical analysis that was conducted on Toyota's electronic engine control system including accelerator pedal position sensors (APPSs)…

Abstract

Purpose

This paper aims to present the results of physical analysis that was conducted on Toyota's electronic engine control system including accelerator pedal position sensors (APPSs). The paper overviews the analyses and focuses on the discovery of tin whiskers found in the accelerator pedal assembly, which are an electrical failure concern.

Design/methodology/approach

Analytical techniques such as X‐ray fluorescence spectroscopy, scanning electron microscopy and energy dispersive spectroscopy are utilized to present a construction analysis of the APPS.

Findings

The use of a tin finish in the APPS is a cause for concern. Tin finishes are known to produce metal whiskers that are conductive and capable of creating unintended current leakage paths. In the analysis, a significant number of tin whiskers were found.

Research limitations/implications

The methodology discussed in this paper can be implemented to inspect for tin whiskers in the APPSs.

Originality/value

The paper begins a construction analysis of different parts of the Toyota engine control module and APPSs and then moves on to highlight electronics design issues that can comprise the engine control system and cause unintended consequences.

Article
Publication date: 1 September 1999

C. Hillman, K. Rogers, A. Dasgupta, M. Pecht, R. Dusek and B. Lorence

This paper presents the defects that occur during the assembly and manufacturing of solder joints in single‐sided insertion‐mount printed wiring boards (PWBs). Each type of defect…

Abstract

This paper presents the defects that occur during the assembly and manufacturing of solder joints in single‐sided insertion‐mount printed wiring boards (PWBs). Each type of defect is discussed, with particular focus on how these defects are related to solderability issues, the mechanisms of failure due to defect‐induced failure accelerators, and the effect of the defect on solder joint reliability.

Details

Circuit World, vol. 25 no. 3
Type: Research Article
ISSN: 0305-6120

Keywords

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