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1 – 10 of 170
Article
Publication date: 5 December 2019

Deepak Balodi, Arunima Verma and Ananta Govindacharyulu Paravastu

The paper aims to present the novel design approach for a low power LC-voltage-controlled oscillators (VCO) design with low phase noise that too targeted at the most sought band…

Abstract

Purpose

The paper aims to present the novel design approach for a low power LC-voltage-controlled oscillators (VCO) design with low phase noise that too targeted at the most sought band of Bluetooth applications. Owing to their crucial role in a wide variety of modern applications, VCO and phase-locked loop (PLL) frequency synthesizers have been the subject of extensive research in recent years. In fact, VCO is one of the key components being used in a modern PLL to provide local frequency signal since a few decades. The complicated synthesizer requirements imposed by cellular phone applications have been a key driver for PLL research.

Design/methodology/approach

This paper first opted to present the recent developments on implemented techniques of LC-VCO designs in popular RF bands. An LC-VCO with a differential (cross-coupled) MOS structure is then presented which has aimed to compensate the losses of an on-chip inductor implemented in UMC’s 130 nm RF-CMOS process. The LC-VCO is finally targeted to embed onto the synthesizer chip, to address the narrowband (S-Band) applications where Bluetooth has been the most sought one. The stacked inductor topology has been adopted to get the benefit of its on-chip compatibility and low noise. The active differential architecture, which basically is a cross-coupled NMOS structure, has been then envisaged for the gain which counters the losses completely. Three major areas of LC-VCO design are considered and worked upon for the optimum design parameters, which includes Bluetooth coverage range of 2.410 GHz to 2.490 GHz, better linearity and high sensitivity and finally the most sought phase noise performance for an LC-VCO.

Findings

The work provides the complete design aspect of a novel LC-VCO design for low phase noise narrowband applications such as Bluetooth. Using tuned MOS varactor, in 130 nm-RF CMOS process, a high gain sensitivity of 194 MHz/Volt was obtained. Thus, the entire frequency range of 2415-2500 MHz for Bluetooth applications, supporting multiple standards from 3G to 5G, was covered by voltage tuning of 0.7-1.0 V. To achieve the low power dissipation, low bias (1.2 V) cross-coupled differential structure was adopted, which completely paid for the losses occurred in the LC resonator. The power dissipation comes out to be 8.56 mW which is a remarkably small value for such a high gain and low noise VCO. For the VCO frequencies in the presented LO-plan, the tank inductor was allowed to have a moderate value of inductance (8 nH), while maintaining a very high Q factor. The LC-VCO of the proposed LO-generator achieved extremely low phase noise of −140 dBc/Hz @ 1 MHz, as compared to the contemporary designs.

Research limitations/implications

Though a professional tool for inductor and circuit design (ADS-by Keysight Technologies) has been chosen, actual inductor and circuit implementation on silicon may still lead to various parasitic evolutions; therefore, one must have that margin pre-considered while finalizing the design and testing it.

Practical implications

The proposed LC-VCO architecture presented in this work shows low phase noise and wide tuning range with high gain sensitivity in S-Band, low power dissipation and narrowband nature of wireless applications.

Originality/value

The on-chip stacked inductor has uniquely been designed with the provided dimensions and other parameters. Though active design is in a conventional manner, its sizing and bias current selection are unique. The pool of results obtained completely preserves the originally to the full extent.

Details

Circuit World, vol. 46 no. 1
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 18 January 2016

Tanyong Wei, Qiulin Tan, Tao Luo, Guozhu Wu, Shun Tang, Dan-Dan Shen, Chen Li and Jijun Xiong

The purpose of this paper is to propose a pressure-, temperature- and acceleration-sensitive structure-integrated inductor-capacitor (LC) resonant ceramic sensor to fulfill the…

Abstract

Purpose

The purpose of this paper is to propose a pressure-, temperature- and acceleration-sensitive structure-integrated inductor-capacitor (LC) resonant ceramic sensor to fulfill the measurement of multi-parameters, such as the measurement of pressure, temperature and acceleration, simultaneously in automotive, aerospace and aeronautics industries.

Design/methodology/approach

The ceramic-based multi-parameter sensor was composed of three LC tanks, which have their resonant frequencies sensitive to pressure, temperature and acceleration separately. Two aspects from the specific sensitive structure design to the multiple signals reading technology are considered in designing the multi-parameter ceramic sensor. Theoretical analysis and ANSYS simulation are used in designing the sensitive structure, and MATLAB simulation and experiment are conducted to verify the feasibility of non-coverage of multi-readout signals.

Findings

It is found that if the parameters of sensitive structure and layout of the LC tanks integrated into the sensor are proper, the implementation of a multi-parameter sensor could be feasible.

Practical implications

The ceramic sensor proposed in the paper can measure pressure, temperature and acceleration simultaneously in harsh environments.

Originality/value

The paper creatively proposes a pressure-, temperature- and acceleration-sensitive structure-integrated LC resonant ceramic sensor for harsh environments and verifies the feasibility of the sensor from sensitive structure design to multiple-signal reading.

Details

Sensor Review, vol. 36 no. 1
Type: Research Article
ISSN: 0260-2288

Keywords

Article
Publication date: 26 January 2010

Harikrishnan Ramiah, Tun Zainal Azni Zulkifli and Noramalia Sapiee

The purpose of this paper is to design and realize a low‐phase noise, high‐output power, and high‐tuning range, fully integrated source injection parallel coupled (SIPC)‐based…

Abstract

Purpose

The purpose of this paper is to design and realize a low‐phase noise, high‐output power, and high‐tuning range, fully integrated source injection parallel coupled (SIPC)‐based inductor‐capacitor (LC)‐quadrature voltage controlled oscillator (QVCO) covering WiMAX frequency range in 0.18‐μm deep submicron CMOS technology.

Design/methodology/approach

A pMOS based‐SIPC LC‐QVCO topology is realized with the center frequency of 2.58 GHz. On chip spiral inductor is integrated with substantial quality factor, Q coupled with underlying pattern ground shield (PGS) shielding. An enhanced tuning range is achieved by integrating the diode connected MOS‐based varactors. The CMOS‐based autonomous SIPC LC‐QVCO circuit was characterized for its output phase noise, tuning range and power spectrum response via wafer probing, utilizing a signal source analyzer (Agilent E5052 A).

Findings

A quadrature oscillator catering to the needs of local oscillator (LO) generation covering the frequency range of WiMAX is realized. The parallel coupled architecture adapts direct source coupling, bypassing the LC resonator tank and relaxes the close in phase noise up‐conversion. The design consumes 2.19 mm2 of active chip area and measures a phase noise of −114.34 dBc/Hz at 1 MHz of offset frequency with 2.67 GHz of output frequency at 0.9 V of input tuning voltage. The corresponding output power measures to be −10.1 dBm, well suited for mixer hard switching. The design is realized in one poly, six metal 0.18‐μm standard CMOS technology.

Research limitations/implications

Owing to convergence discrepancy in the analysis, a diode‐connected MOS varactor is adapted in contrary to the accumulation mode MOS varactors with superior tuning range.

Practical implications

The designed SIPC LC‐QVCO is of need in the generation of low‐phase noise, highly matched quadrature LO generation covering the WiMAX frequency range. The adapted parallel coupling also relaxes the voltage headroom limitation.

Originality/value

This paper shows how a fully integrated CMOS‐based SIPC LC‐QVCO architecture is adapted with low‐output phase noise and low voltage headroom consumption covering the WiMAX frequency range.

Details

Microelectronics International, vol. 27 no. 1
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 3 August 2020

Emad Ebrahimi

Multiphase and quadrature voltage-controlled oscillators (QVCOs) play key roles in modern communication systems and their phase noise performance affects the performance of the…

Abstract

Purpose

Multiphase and quadrature voltage-controlled oscillators (QVCOs) play key roles in modern communication systems and their phase noise performance affects the performance of the overall system. Different studies are devoted to efficient quadrature signals generation. This paper aims to present a new low-phase noise superharmonic injection-locked QVCO.

Design/methodology/approach

The proposed QVCO is comprised of two identical inductor-capacitor circuit (LC)-voltage-controlled oscillators (VCOs) in which second harmonics, with 180° phase shift, are injected from one core VCO to the gate of tail current source of the other VCO via a coupling capacitor. Using second harmonics with high amplitude will switch the tail from the inversion to the accumulation, and therefore, flicker noise is reduced. Also, because of the use of lossless and noiseless coupling elements, that is, coupling capacitors, and also because of the existence of an inherent high-pass filter, the proposed LC-QVCO has a good phase noise performance.

Findings

The introduced technique is designed and simulated in a commercial 0.18 µm radio frequency complementary metal oxide semiconductor (RF-CMOS) technology and 10 dB improvement of close-in phase noise is achieved (compared to the conventional method). Simulation results show that the phase noise of the proposed QVCO is −130.3 dBc/Hz at 3 MHz offset from 5.76 GHz center frequency, while the total direct current (DC) current drawn from a 0.9-V power supply is 4.25 mA (figure of merit = −190.2 dBc). Monte Carlo simulation results show that the figure of merit of the circuit has a Gaussian distribution with mean value and standard deviation of −189.97 dBc and 0.183, respectively.

Originality/value

This technique provides a new simple but efficient superharmonic coupling and noise shaping method that reduces close-in phase noise of superharmonic multiphase VCOs by switching of tail transistors with 2 ω0 (second harmonic of oscillation frequency). No extra devices such as area-consuming transformer or additional power-hungry oscillator are used for coupling.

Details

Circuit World, vol. 47 no. 4
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 11 May 2023

Mehrdad Moradnezhad and Hossein Miar-Naimi

The purpose of this paper is to find a closed relation for the phase noise of LC oscillators.

Abstract

Purpose

The purpose of this paper is to find a closed relation for the phase noise of LC oscillators.

Design/methodology/approach

The governing equation of oscillators is generally a stochastic nonlinear differential equation. In this paper, a closed relation for the phase noise of LC oscillators was obtained by approximating the IV characteristic of the oscillator with third-degree polynomials and analyzing its differential equation.

Findings

This relation expresses phase noise directly in terms of circuit parameters, including the sizes of the transistors and the bias. Next, for evaluation, the phase noise of the cross-coupled oscillator without tail current was calculated with the proposed model. In this approach, the obtained equations are expressed independently of technology by combining the obtained phase noise relation and gm/ID method.

Originality/value

A technology-independent method using the gm/ID method and the closed relationship is provided to calculate phase noise.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering , vol. 42 no. 3
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 1 July 2006

B. Tellini, R. Giannetti and S. Lizón Martínez

This paper aims to show a low‐cost and easy to use measurement method for characterizing magnetic material B(H) relation up to medium frequencies providing an acceptable overall…

Abstract

Purpose

This paper aims to show a low‐cost and easy to use measurement method for characterizing magnetic material B(H) relation up to medium frequencies providing an acceptable overall accuracy of the acquired data.

Design/methodology/approach

Saturation fields at MHz frequencies are obtained through resonance effects of properly designed circuit. Simulations and measurements are presented and discussed.

Findings

The paper shows the flexibility of the method and the possibility to use it for a complete characterization of the magnetic cores. Discussions and possible extension to rotating field measurements are reported.

Originality/value

The paper provides information on a low‐cost and easy to use measurement method to characterize magnetic hysteretic materials.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 25 no. 3
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 4 May 2012

Mei‐Ling Yeh, Yao‐Chian Lin and Wei‐Chieh Chang

The purpose of this paper is to design a low phase noise and high figure of merit, fully integrated, voltage‐controlled oscillator (VCO) which was fabricated in TSMC CMOS 0.18‐μm…

Abstract

Purpose

The purpose of this paper is to design a low phase noise and high figure of merit, fully integrated, voltage‐controlled oscillator (VCO) which was fabricated in TSMC CMOS 0.18‐μm 1P6M process.

Design/methodology/approach

A differential PMOS cross‐coupled architecture VCO with the capacitive feedback technology was designed to increase the linearity of frequency tuning range and decrease the phase noise. Varactor determining the performance of tuning range is also a key component in the design of VCO. The authors adopt the accumulation‐mode MOS varactor. The output spectrum and the phase noise are measured by E5052A spectrum analyzer.

Findings

The VCO is successfully fabricated in TSMC RF CMOS 0.18um 1P6M process. The measured tuning range is from 10.875 GHz ∼ 11.1 GHz with control voltage from 0 to 1.5 V. The measured phase noise is as low as −120.42 dBc/Hz at 1 MHz offset and the high FOM is −189.5 dBc/Hz. The output spectrum is −10.51dBm with center oscillator frequency of 10.942 GHz. The core circuit without buffer consumes power of 15 mW from a 1.8 V supply voltage.

Originality/value

This paper shows a fully integrated CMOS LCVCO architecture using capacitive feedback technology with low phase noise and high figure of merit for OC‐192 SONET applications.

Article
Publication date: 5 March 2018

Hadi Dehbovid, Habib Adarang and Mohammad Bagher Tavakoli

Charge pump phase locked loops (CPPLLs) are nonlinear systems as a result of the nonlinear behavior of voltage-controlled oscillators (VCO). This paper aims to specify jitter…

Abstract

Purpose

Charge pump phase locked loops (CPPLLs) are nonlinear systems as a result of the nonlinear behavior of voltage-controlled oscillators (VCO). This paper aims to specify jitter generation of voltage controlled oscillator phase noise in CPPLLs, by considering approximated practical model for VCO.

Design/methodology/approach

CPPLL, in practice, shows nonlinear behavior, and usually in LC-VCOs, it follows second-degree polynomial function behavior. Therefore, the nonlinear differential equation of the system is obtained which shows the CPPLLs are a nonlinear system with memory, and that Volterra series expansion is useful for such systems.

Findings

In this paper, by considering approximated practical model for VCO, jitter generation of voltage controlled oscillator phase noise in CPPLLs is specified. Behavioral simulation is used to validate the analytical results. The results show a suitable agreement between analytical equations and simulation results.

Originality/value

The proposed method in this paper has two advantages over the conventional design and analysis methods. First, in contrast to an ideal CPPLL, in which the characteristic of the VCO’s output frequency based on the control voltage is linear, in the present paper, a nonlinear behavior was considered for this characteristic in accordance with the real situations. Besides, regarding the simulations in this paper, a behavior similar to the second-degree polynomial was considered, which caused the dependence of the produced jitter’s characteristic corner frequency on the jitter’s amplitude. Second, some new nonlinear differential equations were proposed for the system, which ensured the calculation of the produced jitter of the VCO phase noise in CPPLLs. The presented method is general enough to be used for designing the CPPLL.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 37 no. 2
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 27 July 2012

Siti Maisurah Mohd Hassan, Mohd Azmi Ismail, Nazif Emran Farid, Norman Fadhil Idham Muhammad and Ahmad Ismat Abdul Rahim

The purpose of this paper is to design and implement a fully integrated low‐phase noise and large tuning range dual‐band LC voltage‐controlled oscillator (VCO) in 0.13 μm…

Abstract

Purpose

The purpose of this paper is to design and implement a fully integrated low‐phase noise and large tuning range dual‐band LC voltage‐controlled oscillator (VCO) in 0.13 μm complementary metal oxide semiconductor (CMOS) technology.

Design/methodology/approach

Two parallel‐connected single‐band VCOs are designed to implement the proposed VCO. Adopting a simple and straight‐forward architecture, the dual‐band VCO is configured to operate at two frequency bands, which are from 1.48 GHz to 1.78 GHz and from 2.08 GHz to 2.45 GHz. A band selection circuit is designed to perform band selection process based on the controlling input signal.

Findings

The proposed VCO features phase noise of −104.7 dBc/Hz and −108.8 dBc/Hz at 1 MHz offset frequency for both low corner and high corner end of the low‐band operation. For high‐band operation, phase‐noise performance of −101.1 dBc/Hz and −110.4 dBc/Hz at 1 MHz offset frequency are achieved. The measured output power of the dual‐band VCO ranges from −8.4 dBm to −5.8 dBm and from −9.6 dBm to −8.0 dBm for low‐band and high‐band operation, respectively. It was also observed that the power differences between the fundamental spectrum and the nearby spurious tone range from −67.5 dBc to −47.7 dBc.

Originality/value

The paper is useful to both the academic and industrial fields since it promotes the concept of multi‐band or multi‐standard system which is currently in demand in the telecommunication industry.

Article
Publication date: 3 May 2016

Deepa George and Saurabh Sinha

The demand for higher bandwidth has resulted in the development of mm-wave phased array systems. This paper aims to explore a technique that could be used to feed the individual…

Abstract

Purpose

The demand for higher bandwidth has resulted in the development of mm-wave phased array systems. This paper aims to explore a technique that could be used to feed the individual antennas in a mm-wave phased array system with the appropriate phase shifted signal to achieve the required directivity. It presents differential Colpitts oscillators at 5 and 60 GHz that can provide differential output signals to the quadrature signal generators in the proposed phase shifter system.

Design/methodology/approach

The phase shifter system comprises a differential Colpitts voltage controlled oscillator (VCO) and utilizes the vector-sum technique to generate the phase shifted signal. The differential VCO is connected in the common-collector configuration for the 5-GHz VCO, and is extended using a cascode transistor for the 60-GHz VCO for better stability at mm-wave. The vector sum is achieved using a variable gain amplifier (VGA) that combines the in-phase and quadrature phase signal, generated from oscillator output using hybrid Lange couplers. The devices were fabricated using IBM 130-nm SiGe BiCMOS process, and simulations were performed with a process design kit provided by the foundry.

Findings

The measured results of the 5-GHz and 60-GHz VCOs indicate that differential Colpitts VCO could generate oscillator output with good phase noise performance. The simulation results of the phase shifter system indicate that the generation of signals with phases from 0° to 360° in steps of 22.5° was achieved using the proposed approach. A Gilbert mixer topology was used for the VGA and the linearity was improved by a pre-distortion circuit implemented using an inverse tanh cell.

Originality/value

The measurement results indicate that differential Colpitts oscillator in common-collector configuration could be used to generate differential VCO signals for the vector-sum phase shifter. The simulation results of the proposed phase shifter system at mm-wave show that the phase shift could be realised at a total power consumption of 200 mW.

Details

Microelectronics International, vol. 33 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

1 – 10 of 170