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The electronics assembly industry has fortunately rediscovered conductive adhesives as the search for lead‐free joining materials and improved performance intensifies. Although these intrinsically clean bonding agents are often first sought for their favourable environmental attributes, many are surprised to find that conductive adhesives can solve old and new problems. Today, new polymer solders for SMT allow low temperature processing, finer pitch assembly and wider processing latitude while providing compatibility with a very much larger range of materials than solder. State‐of‐the‐art adhesives are oxide‐tolerant and absolutely no fluxing or cleaning is required. Adhesives work where solder cannot be used. What's more, polymer‐based solder alternatives can run on existing SMT lines — no new equipment is needed. Z‐axis, or anisotropic, bonding agents are uni‐directional conductive materials that solve fine pitch interconnect problems in several areas. The anisotropics now dominate the flat panel interconnect field. Nearly every LCD and other flat panel display is connected with a polymer adhesive. The Z‐axis adhesives are also beginning to enable high density multilayer circuits and MCMs to be built more effectively. Finally, Z‐axis appears to offer the simplest and most cost‐effective means for flip chip bonding. However, special equipment is required. The paper compares the metallurgical solder joint, the present de facto standard, with the polymer composite bond to highlight similarities and important differences. All types of conductive adhesives are discussed including the latest — Area Array Z‐axis types. Bonding materials, assembly processes and performance are also covered.

The Packaging Revolution of the ’90s, powered by the perpetual drive for smaller‐faster‐cheaper products, is placing increasing demands on the electronic materials sector. Down‐sizing, without a cost penalty, requires new materials and processes. Electronic polymers are playing an increasingly vital rôle as area array, chip size components and packageless designs become mainstream technologies. Micro‐Ball Grid Arrays (micro‐BGA), Chip Scale Packages (CSP) and Chip‐on‐Board(COB) require new adhesives and encapsulants that enable the use of low‐cost, high density organic‐based wiring and interconnect structures. Concurrently, new, simplified processes are being developed in order to streamline high volume manufacturing. This paper discusses quick bonding film die attach adhesives, fast‐flow flip‐chip underfills, and a variety of liquid encapsulants as well as new conductive adhesives designed for flip‐chip and micro‐Package assembly. Process innovations include the new Printed Package concept and the appealing simple Polymer Dip Chip method of flip‐chip assembly without paste deposition. The intrinsic versatility and synergy afforded by new and emerging electronic polymers are helping the industry meet the seemingly paradoxical challenge of smaller‐faster‐cheaper.

Reviews the traditional use of thermoset (epoxy) adhesives for various bonding applications and highlights some limitations in today’s microelectronics arena. In particular, concerns for thermal and stress management associated with large area silicon bonded to a wide variety of substrate materials has led to an increasing interest in thermoplastic adhesive technology. Thermoplastics are not always the best solution for every application. This paper sets out to address the “pros and cons” of each polymer technology for different microelectronic applications taking into account some of the key physical properties such as Tg, TCE and modulus. In addition, practical issues such as handling, storage and processing are considered in detail.

Conductive adhesives (CAs) have been with us for a number of years and have found use in a variety of applications. More recently pressure from environmentalists has led to a reappraisal of the potential of the materials to replace solders in mainstream assembly operations. In this respect they have the advantages that they do not contain lead and do not use fluxes. At present, however, there is no substitute for flow soldering operations which still account for a substantial part of the assembly market. There also appear to be serious grounds for concern regarding the reliability of adhesive joints. In particular, recent reports suggest that their resistance to mechanical shock may be unsatisfactory. In the light of these drawbacks it seems likely that CAs will continue to find niche applications, where their particular properties give them advantages, but that soldering will continue to be the dominant technology for PCB assembly for the foreseeable future.

Most flip chip assemblies require underfill to bestow reliability that would otherwise be ravished by stress due to thermomechanical mismatch between die and substrate. While underfill can be viewed as “polymer magic” and the key to modern flip chip success, many see it as the process “bottleneck” that must be eliminated in the future. Both views are accurate. A substantial amount of R&D is being focused on making underfill more user‐friendly. Electronic materials suppliers, various consortia, government labs and university researchers are working diligently to shatter the bottleneck and fully enable flip chip ‐ the final destination for micropackaging. This paper will describe these efforts and provide a status report on state‐of‐the‐art underfill technologies. We will also examine new processing strategies.

Non‐planarity of assemblies and co‐planarity variation effects on anisotropic conductive adhesive (ACA) assemblies have been a concern for ACA users since the materials are first devised. The primary objective of this paper is to introduce a new experimental method for studying co‐planarity variation effects on ACA assemblies.

The approach simulates non‐planarity through deliberate chip rotation during the ACA bonding process, thereby locking different levels of co‐planarity variation into ACA test assemblies. Scanning electron microscope (SEM) analysis and electrical joint resistance measurement using the four wire resistance (FWR) method are used to mechanically and electrically examine the connection quality of the ACA assemblies bonded with non‐planar joints, for which the chip and substrate patterns are specially designed to allow joint resistance measurement using the FWR method.

Typical experiments and their results are presented and analysed. The bond thickness differences between the SEM measurements and calculations indicate that the real rotations are smaller than those predicted by the calculations. The typical experimental results show that the joint resistance reduces as the deformation increases until reaching a relatively stable value after a certain deformation degree.

The average joint resistances in the rotated samples are all bigger than those measured in the un‐rotated samples. This raises the question as to whether the joint resistances of ACA assemblies are more significantly affected by other affects of non‐planarity than just by its effect on bond thickness. However, before this can be confirmed, more research must be done to check if this behaviour happens for different bonding forces.

This paper reports a novel and simple experiment that can be used to examine the effects of co‐planarity variation on the electrical performance of ACA assemblies, by creating different bond thicknesses that are normally difficult to achieve by changing the bonding pressure, since ACA bond thicknesses are not linearly related to the bonding force. The merit of the technique is that there is no need to manufacture chip bumps and substrate pads with different geometries, or to control the bond pressure, to achieve bond thickness variation in ACA assemblies.

Polymer thick film (PTF) technology provides the lowest cost, cleanest and most efficient manufacturing method for producing flexible circuits. Non‐contact radio frequency (RF) smart cards and related information transaction devices, such as RFID tags, appear to be a good fit for PTF‐flex. Flip chip also seems well suited for these “contactless” RF transceiver products. Flip chip and PTF adhesive technologies are highly compatible and synergistic. All PTF SMT adhesives assembly methods are viable for flip chip. However, the merging of flip chip with PTF‐flex presents major challenges in design, materials and processing. This paper will compare assembly methods and discuss obstacles and solutions for state‐of‐the‐art flip chip on flex within the RFID product environment.

Selection of the correct interconnection technique for high lead count integrated circuits is dependent on technical and economic factors, in particular in small batch production of application specific devices (ASICs). This paper reviews some of the interconnection options and describes work where some advances in high density interconnection have been made.

Polyester connector strips were joined to polyimide substrates with anisotropic electrically conductive adhesives. Copper conductors as well as Au/Ni‐coated copper conductors were used on flexible circuits. The adhesives were composite materials consisting of heat curing, one‐component epoxy resin and powdered ternary solder alloys: tin‐bismuth‐zinc, tin‐indium‐zinc and tin‐zinc‐aluminium. An adhesive filled with eutectic tin‐bismuth alloy powder was used as reference. The effect of bonding parameters (e.g., temperature, dwell time and pressure) on contact resistance values was evaluated. The contact resistance values were measured for evaluating the reliability of adhesive joints during a 60°C/95%RH test. Furthermore, the joint microstructures were examined with optical and scanning electron microscopy. The results showed that with the copper conductors the initial contact resistance values were lower than with the Au/Ni‐coated copper conductors. The most reliable joints were produced with low melting filler alloys (with respect to bonding temperature) on bare copper metallisation. The most likely reason for failure of the Au/Ni‐coated circuits was strong oxidation of locally exposed nickel in the presence of moisture.