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This study aims to extend the driving range by on-board charging with use of photovoltaic (PV) source, avoiding the dependency on the grid supply and energy storage system in addition to that reduce the conversion complexity influenced on converter section of electric vehicle (EV) system.

This paper proposed a PV fed integrated converter topology called integrated single-input multi-output (I-SIMO) converter with enriched error tolerant fuzzy logic controller (EET-FLC) based control technique to regulate the speed of brushless direct current motor drive. I-SIMO converter provides both direct current (DC) and alternating current (AC) outputs from a single DC input source depending on the operation mode. It comprises two modes of operation, act as DC–DC converter in vehicle standby mode and DC–AC converter in vehicles driving mode.

The use of PV panels in the vehicle helps to reduce dependence of grid supply as well as vehicle’s batteries. The proposed topology has to remove the multiple power conversion stages in EV system, reduce components count and provide dual outputs for enhancement of performance of EV system.

The proposed topology leads to reduction of switching losses and stresses across the components of the converter and provides reduction in system complexity and overall expenditure. So, it enhances the converter reliability and also improves the efficiency. The converter provides ripple-free output voltage under dynamic load condition. The performance of EET-FLC is studied by taking various performance measures such as rise time, peak time, settling time and peak overshoot and compared with conventional control designs.

Carpal tunnel syndrome (CTS) is a hand disease caused by the pressing of the median nerve present in the palmar side of the wrist. It causes severe pain in the wrist, triggering disturbance during sleep. Different products like splints, braces and gloves are available in the market to alleviate this disease but there was still a need to improve the wearability, comfort and cost of the product. This study was about designing a comfortable and cost-effective wearable system for mild-to-moderate CTS. Transcutaneous electrical nerve stimulation (TENS) therapy has been used to reduce the pain in the wrist.

After simulation by using Proteus software (which allowed the researchers to draw and simulate electrical circuits using ISIS, ARES and PCB design tools virtually), the circuit with optimum frequency, i.e. 33 Hz was selected, and the circuit was developed on a printed circuit board (PCB). The developed circuit was integrated successfully into the half glove structure.

The developed product had good thermophysiological comfort and hand properties as compared to the commercially available product of the same kind. In vivo testing (It involves the testing with living subjects like animals, plants or human beings) was performed which resulted in 85% confirmed viability of the product against CTS. A glove with an integrated circuit was developed successfully to accommodate various sizes without any sex specifications in a cost-effective way to mitigate the issue of CTS.

Industrial workers, individuals frequently using their hands or those diagnosed with CTS may wish to use this product as therapy. The attention could not be paid to the aesthetic or visual appeal of the developed product.

A very comfortable glove with integrated TENS electrodes was developed successfully to accommodate various sizes without any sex specifications in a cost-effective way to mitigate the issues of CTS.

Recent advancements in the domain of smart communication systems and technologies have led to the augmented developments for very large scale integrated circuit designs in electro-magnetic applications. Increasing demands for low power, compact area and superior figure of merit–oriented circuit designs are the trends of the recent research studies. Hence, to accomplish such applications intended for optical communications, the transimpedance amplifier (TIA) was designed.

In this research work, the authors present a multi-layer active feedback structure which mainly composes a transimpedance stage and a gain stage followed by a low pass filter. This structure enables to achieve improved input impedance and superior gain. A simplified cascaded amplifier has also been designed in a hierarchical topology to improvise the noise effect further. The proposed TIA has been designed using Taiwan Semiconductor Manufacturing Company 45 nm complementary metal oxide semiconductor technology. Moreover, the thermal noise has been analyzed at −3 dB bandwidth to prove the reduction in thermal noise with increase in frequency for most of the devices used in the designed circuit.

The proposed differential TIA circuit was found to obtain the transimpedance gain of 50.1 dBO without applying any external bias current which is almost 8% improvised as compared to the conventional circuit. In addition to this, bandwidth achieved was 2.15 GHz along with only 38 W of power consumption, which is reasonably 100 times improvised in comparison of conventional circuit. Hence, the proposed differential TIA is suitable for the low power optical communications applications intended to work on low supply voltage.

The designed work is done by authors in university lab premises and is not copied from anywhere. To the best of the authors’ knowledge, it is 100% original.

The design and implementation of a broadband quasi-monolithic microwave integrated circuit (q-MMIC) power amplifier (PA) is presented for 0.2 to 2.2 GHz applications.

To obtain an efficient, high-gain and high-power performance with in a compact and low-cost size, the prototype is based on Gallium nitride (GaN) on SiC 0.25-µm transistors, whereas the passive matching networks are realized on an AlN substrate as thin film circuit.

Measured results of the q-MMIC PA across the 0.2 to 2.2 GHz band show at least 32 ± 3 dB small-signal gains, an output power of 7 to 12 W and an average power add efficiency greater than 54%. The q-MMIC occupies an area of 12.8 × 14.5 mm².

To the best of the authors’ knowledge, this work reports the first full integrated PA which covers the frequency range of 0.2 to 2.2 GHz and achieves the combination of highest gain, about 10 W output power, together with the smallest component size among all published GaN PAs to date.

In 2022, the Baltimore professional development school (PDS) partner schools, John Ruhruh Elementary/Middle School (JREMS) and Notre Dame of Maryland University (NDMU) received funds through a Maryland Educational Emergency Revitalization (MEER) grant to determine (a) to what extent additional resources and professional development would increase JREMS teachers’ efficacy in technology integration and (b) to what extent NDMU professional development in the form of workshops and self-paced computer science modules would result in greater use of technology in the JREMS K-8 classrooms. Results indicated a statistically significant improvement in both teacher comfort with technology and integrated use of technology in instruction.

Survey data were collected on teacher-stated comfort with technology before and after grant implementation. Teachers’ use of technology was also measured by unannounced classroom visits by administration before and after the grant implementation and through artifacts teachers submitted during NDMU professional development modules.

Results showing significant increases in self-efficacy with technology along with teacher integration of technology exemplify the benefits of a PDS partnership.

This initiative was original in its approach to teacher development by replacing required teacher professional development with an invitation to participate and an incentive for participation (a personal MacBook) that met the stated needs of teachers. Teacher motivation was strong because teammates in a strong PDS partnership provided the necessary supports to induce changes in teacher self-efficacy.

The purpose of this paper is to carry out a detailed analysis of two port converter fed by Solar and wind sources during different operational modes by small signal modelling. The converter is fully characterized and simulated using Matlab/Simulink. The voltage and current waveforms along with their corresponding expressions describing the converter operation are presented in detail. Then the DC-averaged equivalent topology is derived using circuit averaging technique. A complete derivation of the power stage transfer functions relevant to the capacitor voltage loop, such as capacitor voltage to solar voltage and inductor current to wind input voltage is obtained.

Stability analysis is used to analyze the small deviations around the steady-state operating point which helps in modeling the closed loop converter parameters. This paper presents the analysis, modeling and control of two port Cuk-buck converter topology.

Based on the results, a control strategy is designed to manage the energy flow within the system. A lab-level prototype for Cuk-buck converter with PWM controller is implemented and tested under various input conditions to study the performance of the converter during seasonal changes. The simulation and experimental results showed that effective operation and control strategy of the hybrid power supply system managed to be achieved alongside its feasible outputs.

This analysis can be extended to all power electronic converters and will be useful for the design of controllers.

An appropriate control design plays a key role in enhancing the overall performance of the system. Hence, this paper is intended to present in detail the small signal modeling of the Cuk-buck converter along with the control design for all the switching modes.

Though this type of converter topology has been discussed widely in literature, very scarce literature is available related to modeling and control design of the converter. A state-space averaging model of the converter followed by a type-II compensator design is described, and prototype design and experimental results are also presented.

This paper aims to develop high-pass (HP) negative group delay (NGD) investigation based on three-port lumped circuit. The main particularity of the proposed three-port passive topology is the consideration of only a single circuit element represented by a capacitor.

The methodology of the paper is to consider the S-matrix equivalent model derived from admittance matrix approach. So, an S-matrix equivalent model of a three-port circuit topology is established from admittance matrix approach. The frequency-dependent basic expressions are explored to perform the HP-NGD analysis. Then, the existence condition of HP-NGD function type is analytically demonstrated. The specific characteristics and synthesis equations of HP-NGD circuit with respect to the desired optimal NGD value are established.

After computing the frequency expressions to perform the HP-NGD analysis, this study demonstrated the existence condition of HP-NGD function type analytically. The validity of the HP-NGD theory is verified by a prototype of three-port circuit. The proof-of-concept (POC) single capacitor three-port circuit presents an NGD response and characteristics from analytical calculation and simulation is in very good correlation.

An innovative theory of HP-NGD three-port circuit is studied. The proposed HP-NGD topology is constituted by only a single capacitor. After the topological description, the S-matrix model is established from the Y-matrix by means of Kirchhoff voltage law and Kirchhoff current law equations. A POC of single capacitor three-port circuit was designed and simulated with a commercial tool. Then, a prototype with a surface-mounted device component was fabricated and tested. As expected, simulation and measurement results in very good agreement with the calculated model show the feasibility of the HP-NGD behavior. This work is compared to other NGD-type function with diverse number of ports and components.

The purpose of this paper is to study, a bridged-T topology with inductorless passive network used as a bandpass (BP) negative group delay (NGD) function.

The BP NGD topology under study is composed of an inductorless passive resistive capacitive network. The circuit analysis is elaborated from the equivalent impedance matrix. Then, the analytical model of the C-shunt bridged-T topology voltage transfer function is established. The BP NGD analysis of the considered topology is developed in function of the bridged-T parameters. The NGD properties and characterizations of the proposed topology are analytically expressed. Moreover, the relevance of the BP NGD theory is verified with the design and fabrication of surface mounted device components-based proof-of-concept (PoC).

From measurement results, the BP NGD network with −151 ns at the center frequency of 1 MHz over −6.6 dB attenuation is in very good agreement with the C-shunt bridged-T PoC.

This paper develops a mathematical modeling theory and measurement of a C-shunt bridged-T network circuit.

As it is known, the electrostatic discharge (ESD) protection design of integrated circuit is very important, among which the silicon controlled rectifier (SCR) is one of the most commonly used ESD protection devices. However, the traditional SCR has the disadvantages of too high trigger voltage, too low holding voltage after the snapback and longer turn-on time. The purpose of this paper is to design a high-performance SCR in accordance with the design window under 0.25 µm process, and provide a new scheme for SCR design to reduce the trigger voltage, improve the holding voltage and reduce the turn-on time.

Based on the traditional SCR, an RC-INV trigger circuit is introduced. Through theoretical analysis, TCAD simulation and tape-out verification, it is shown that RC-INV triggering SCR can reduce the trigger voltage, increase the holding voltage and reduce the turn-on time of the device on the premise of maintaining good robustness.

The RC-INV triggering SCR has great performance, and the test shows that the transmission line pulse curve with almost no snapback can be obtained. Compared with the traditional SCR, the trigger voltage decreased from 32.39 to 16.24 V, the holding voltage increased from 3.12 to 14.18 V and the turn-on time decreased from 29.6 to 16.6 ns, decreasing by 43.9% the level of human body model reached 18 kV+.

Under 0.25 µm BCD process, this study propose a high-performance RC-INV triggering SCR ESD protection device. The work presented in this paper has a certain guiding significance for the design of SCR ESD protection devices.

The purpose of this research paper is to explore the possibility to enhance the power transfer from piezoelectric energy harvester (PEH) source to the load. As the proposed gyrator-induced voltage flip technique (GIVFT) does not require bulky components such as physical inductors, it is easily realizable in small integrated circuits (IC) package thereby offering performance benefits, reducing area overhead and providing cost benefits for constrained self-powered autonomous Internet-of-Things (IoT) applications.

This paper presents an inductorless interface circuit for PEH. The proposed technique is called GIVFT and is demonstrated using active elements. The authors use gyrator to induce voltage flip at the output side of PEH to enhance the charge extraction from PEH. The proposed technique uses the current-voltage (I-V) relationship of gyrator to get appropriate phasor response necessary to induce the voltage flip at the output of PEH to gain power transfer enhancement at the load.

The experimental results show the efficacy of the GIVFT realization for enhanced power extraction. The authors have compared their proposed design with popular earlier reported interface circuits. Experimentally measured performance improvement is 1.86×higher than the baseline comparison of full-wave bridge rectifier circuit. The authors demonstrated a voltage flip using GIVFT to gain power transfer improvement in piezoelectric energy harvesting.

To the best of the authors’ knowledge, pertaining to the field of PEH, this is the first reported GIVFT based on the I-V relationship of the gyrator. The proposed approach could be useful for constrained self-powered autonomous IoT applications, and it could be of importance in guiding the design of new interface circuits for PEH.