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Integrality of surface mesh is requisite for computational engineering. Nonwatertight meshes with holes can bring inconvenience to applications. Unlike simple modeling or visualization, the downstream industrial application scenarios put forward higher requirements for hole-filling, although many related algorithms have been developed. This study aims at the hole-filling issue in industrial application scenarios.

This algorithm overcomes some inherent weakness of general methods and generates a high-level resulting mesh. Initially, the primitive hole boundary is filled with a more appropriate triangulation which introduces fewer geometric errors. And in order for better performances on shape approximation of the background mesh, the algorithm also refines the initial triangulation with topology optimization. When obtaining the background mesh defining the geometry and size field, spheres on it are packed to determine the vertex configuration and then the resulting high-level mesh is generated.

Through emphasizing geometry recovery and mesh quality, the proposed algorithm works well in hole-filling in industrial application scenarios. Many experimental results demonstrate the reliability and the performance of the algorithm. And the processed meshes are capable of being used for industrial simulation computations directly.

This paper makes input meshes more adaptable for solving programs through local modifications on meshes and perfects the preprocessing technology of finite element analysis (FEA).

This paper aims to present a robust prediction method for estimating the quality of electronic products assembled with pin-in-paste soldering technology. A specific board quality factor was also defined which describes the expected yield of the board assembly.

Experiments were performed to obtain the required input data for developing a prediction method based on decision tree learning techniques. A Type 4 lead-free solder paste (particle size 20–38 µm) was deposited by stencil printing with different printing speeds (from 20 mm/s to 70 mm/s) into the through-holes (0.8 mm, 1 mm, 1.1 mm, 1.4 mm) of an FR4 board. Hole-filling was investigated with X-ray analyses. Three test cases were evaluated.

The optimal parameters of the algorithm were determined as: subsample is 0.5, learning rate is 0.001, maximum tree depth is 6 and boosting iteration is 10,000. The mean absolute error, root mean square error and mean absolute percentage error resulted in 0.024, 0.03 and 3.5, respectively, on average for the prediction of the hole-filling value, based on the printing speed and hole-diameter after optimisation. Our method is able to predict the hole-filling in pin-in-paste technology for different through-hole diameters.

No research works are available in current literature regarding machine learning techniques for pin-in-paste technology. Therefore, we decided to develop a method using decision tree learning techniques for supporting the design of the stencil printing process for through-hole components and pin-in-paste technology. The first pass yield of the assembly can be enhanced, and the reflow soldering failures of pin-in-paste technology can be significantly reduced.

Printed circut boards (PCBs) have diminished in size and, simultaneously, their circuit densities have increased. Conventional multi‐layered PCBs have a limitation to higher packaging densities. This paper introduces a new copper electroplating formula that is able to fill vias and through holes simultaneously and is used in a DC plating method, in which the copper thickness deposited on the board surface is relatively very thin after the electroplating is completed.

The purpose of this paper is to develop a novel automatic and accurate measurement technique for the volume of solder which is present in solder paste in pin‐in‐paste (PIP) technology and a calculation algorithm for predicting solder joint quality.

A new method is described for accurately determining the volume of solder alloy in solder paste that is present in and around the through hole, using X‐ray measurements (orthogonal view X‐ray images, instead of angle view), image processing and other calculations. In addition, various calibration tool constructions are investigated and a method is suggested for determining the calibration curve (for each solder paste) of an X‐ray machine.

A new calibration tool has been developed to accurately measure the calibration curve of X‐ray machines. Based on several tests, a fast and reliable image processing method for measuring the average grey scale of each pasted through hole is described. Numerous PIP solder joints have been created then analysed using the methodology. To verify the efficiency of the described methods, joints are soldered and inspected using cross‐sectioning and X‐ray imaging.

Calibration curve measurement of an X‐ray machine is done with the help of the developed tool for PIP technology. Orthogonal view X‐ray images are used to measure the volume of printed solder alloy (paste). During the image processing, circle fitting has been simplified to line fitting.

The purpose of this paper is to present a clear picture of the key factors of blind via and through hole filling in electroplating, e.g. shape of via or hole, electroplating solution, process, as well as the developments of mechanisms and models.

First, the paper details the development trends and challenges of via filling. Then the research status of mechanisms, electroplating solutions, including base solution and additives, numerical model and mass transfer is described. Finally, through hole filling is briefly reviewed.

To achieve excellent via filling performance, the characteristics of the via or hole, the ratio of acid/copper, selection of additives and factors of mass transfer are comprehensively considered in terms of optimization of the electroplating process. It is beneficial to design vias with appropriate aspect ratios, to strengthen the adsorption of the accelerator in the via bottom, to inhibit the increase of surface copper thickness and to form butterfly-shaped copper in the centre of through holes. Optimized process parameters should be taken into consideration in superfilling.

The paper reviews different sets of additives, mechanisms and superfilling models for state-of-the-art via filling and the developments of filling for through holes.

This paper describes how PCB designers must adjust their approach to take into account the new requirements for the production of high technology printed circuit boards using the latest plated‐through hole and surface mounting techniques. It also describes how the correct use of dry film solder masks is contributing towards the achievement of zero‐defect soldering.

The purpose of this paper is to present a summary of development work made in technical centres and on the subsequent customer qualification of copper filled through holes and blind microvias.

Various copper deposition parameters were investigated in a small‐scale production line which was then extended to full‐scale production qualification in a horizontal conveyorised system. Samples of substrates with copper filled through holes were qualified at end‐user facilities.

The copper plating process may be used to replace an existing production process for printed circuit boards. The proposed system can give a more reliable result in terms of filling and technical capability for the produced substrate. Overall production cost savings are possible.

The technology is based on a copper plating electrolyte using a redox pair for copper replenishment. The results achieved depend on use of this system and on production equipment which can control the redox system and copper concentration within a tight range.

The paper shows how the use of a horizontal production system with redox copper replenishment can achieve filling of though holes and blind microvias with reduced surface plated copper thickness. Reduction in the use of copper saves both resources and also reduces production costs. The process is proposed as an alternative to existing paste plugging processes, which are both cost and labour intensive.

Solder masks are used universally on high density printed circuit boards to reduce the occurrence of solder bridges between adjacent tracks and pads. The use of solder mask can, however, have a deleterious effect on the solderability, i.e., the solder pull‐through and top‐land wetting, of plated‐through‐hole boards. This work considers, quantitatively, the specific effect on PTH board solderability of solder mask, considering in turn the three classes of photoimageable dry film, photoimageable ink and screen printed ink. Two modes of solderability degradation have been identified: a geometrical effect that depends on the thickness of the mask and its encroachment around the solderable pads, and a contamination effect arising from the development and washing of the photoimageable masks from surfaces to be soldered subsequently.

This study aims to explore how stakeholders leverage their guanxi and structural holes to promote knowledge mobilization to increase the performance of sci-tech achievement transformation.

This study conducted questionnaires, a social network analysis and semistructured interviews to examine its hypotheses by gathering data from a university and an enterprise in China.

Structural holes impede knowledge mobilization among stakeholders in their network, but guanxi moderates this impeding effect. In addition, knowledge mobilization promotes transformation performance.

By developing a mechanism to illustrate how stakeholders strategically leverage their guanxi and structural holes to affect the efficacy of knowledge mobilization to increase transformation performance, we reveal how stakeholders interact to co-create values for innovation, thereby contributing to the innovation and knowledge management literature.