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Advanced discrete wiring systems are being developed to produce state‐of‐the‐art circuit boards for packaging the next generation electronic systems. The demands placed on electronic interconnection by very high speed VLSI devices have created a need for large circuit boards that will support high interconnection density. At the same time these circuit boards must maintain the necessary transmission line parameters to transport signals with sub‐nanosecond rise times and retain signal fidelity.

This paper looks at the implications of increases in system speed and density for the interconnection system, noting particularly the increased requirements placed on the substrate and tracking system. It reviews the properties required of substrates and the limitations derived from the materials used and the processes needed to put tracks on them. Those areas where these requirements are in conflict are highlighted, including such low technology problems as the limited size availability of substrate prepregs which may limit the tracking density achievable on the newer, more advanced low dielectric materials. Some limitations and trade‐offs are identified.

Current-mode approach promises faster and more precise comparators that lead to high-performance and accurate winner-take-all circuits. The purpose of this paper is to present a new high-performance, high-accuracy current-mode min/max circuit for low-voltage applications. In addition, the proposed circuit is designed based on a new efficient high-resolution current conveyor-based fully differential current comparator.

The proposed design detects the min and max values of two analog current signals by means of a current comparator and a logic module. The comparator compares the values of the input current signals accurately and generates two digital control signals and the logic module determines the min and max values based on the controls signals. In addition, an accurate current copy module is utilized to copy the input current signals and convey them to the comparator and the logic module.

The results of the comprehensive simulations, conducted using HSPICE with the TSMC 90 nm CMOS technology, demonstrate the high-performance and robust operation of the proposed design even in the presence of process, temperature, input current and supply voltage variations. For a case in point, for 5 μA differential input current the average propagation delay and power consumption of the proposed circuit are attained as 150 ps and 150 µW, respectively, which leads to more than 64 percent improvement in terms of power-delay product as compared with the most efficient design, previously presented in the literature.

A new efficient structure for current-mode min-max circuit is proposed based on a novel current comparator design which is accurate, high-performance and robust to process, voltage and temperature variations.

Numerical techniques and experimental methods for the electrical characterisation and design of large multilayer thick film circuit boards are discussed. The numerical techniques investigated here include the boundary element and finite element methods for the estimation of capacitance and inductance and the method of normal modes for the analysis of voltage crosstalk between coupled transmission lines. Three‐dimensional capacitance and inductance calculations are included for typical thick film signal line and power and ground grid plane configurations. Numerical results are compared with measured data obtained from carefully constructed test coupons. Electrical characteristics of several popular high speed logic families and their compatibility with multilayer thick film interconnects are discussed and guidelines for the design of large thick film circuit boards for high speed digital applications are presented.

Computer algebra or symbolic manipulation is nothing else than performing analytical calculations with the help of a computer. This offers the advantage that lengthy and complicated calculations can be carried out without errors in a very short time. Computer algebra techniques have also been applied to solve electrical networks. This offers particular advantages for hybrid circuit design, as will be outlined extensively in this paper.

Differing from previous studies trying to solve the electromagnetic compatibility (EMC) issue by addressing single factor, this study aims to combine measures of shielding, filtering and grounding to design parameters with the Taguchi method at the beginning of product design to come up with the optimal parameter combination.

EMC-related performance such as radiated emission, conduction interference and electrical fast transient/burst immunity (EFT) are response variables, whereas the printed circuit board and mechanic design-relevant parameters are considered as control factors. The noise factors are peripherals used together with the tablet.

The optimal design parameter matrix based on results from the application and integration of multivariate analysis method of principal component grey relation and technique for order preference by similarity to ideal solution suggests 14 grounding screw holes, cooling aperture of casing at diameter of 3 mm and staggered layout and 300O filter located at source of noise. Validation of this matrix shows around 10, 1 and 8 per cent improvement in radiation, conduction interference and EFT immunity.

The multivariate quality parameters’ design method proposed by this study improves EMC characteristics of products and meets the design specification required by customer, accelerating electronic product research and development process and complying with electromagnetic interference test regulations set forth by individual country.

The value of the controlled impedance of various track configurations is usually obtained using algebraic equations. Most of these equations, particularly those for non‐zero track thickness, have been obtained by either theoretical approximations or curve‐fitting the results of numerical solutions of the basic electromagnetic equations. With the advent of modern PCs it is now possible to calculate the impedances directly and quickly, using numerical techniques. This has the advantage of improving the accuracy of the impedance value and increasing the range of validity. Furthermore, a wider range of configurations is now possible. The paper discusses the algebraic equations and numerical solutions in more detail.

The increasing use of high switching speed systems in both microwave electronics and high speed logic devices has created the need for printed circuit boards which are based on low dielectric constant and low loss materials. In addition, these circuit materials must be capable of withstanding elevated temperatures typical of hostile service environments and of board fabrication processes. Such low dielectric constant rigid boards are commercially available from a few sources. However, there is a growing demand for low dielectric constant flexible printed circuit boards for interconnecting rigid boards or in rigid/flex applications where high speed, fast rise times, controlled impedance and low crosstalk are important. A new family of thin laminates which are suitable for fabrication of flexible low dielectric constant printed circuit boards have been developed by Rogers Corporation. These circuit materials are called ROhyphen;2500 laminates and offer flexible interconnections in high speed electronic systems. RO‐2500 circuit materials are based on microglass reinforced fluorocarbon composites and have a typical dielectric constant of 25. The transmission line properties of these materials have been evaluated by the IPC‐FC‐201 test method. The results indicated that these circuit materials improve the propagation velocity by about 10% and the rise time by about 30% when compared with the same geometry, polyimide film based, flexible PCs in stripline constructions. Also, dimensional stability of these laminates after etch and heat ageing is improved over that of the standard flex circuit materials based on polyimide film. RO‐2500 laminate properties have been evaluated by the IPC‐TM‐650 test methods, which are widely accepted by the flexible PCB industry.

Increasing speeds combined with the level of integration that can be obtained with advanced IC technology has dramatically changed the interconnection requirements for high performance electronic systems. With much of today's circuitry being implemented in custom silicon, IC technology has allowed both a dramatic reduction in size and a tremendous increase in performance. However, in terms of the interconnection problem, the by‐product of advanced IC technology is a new generation of IC s that often require several hundred I/OS, exhibit rise times of 150 ps to 300 ps, and dissipate several watts per device. As demanding requirements are placed upon circuit boards, the complexity of the design task increases dramatically, since a working solution must simultaneously address interconnection density, signal integrity and thermal performance. This paper examines embedded discrete wiring technology as a high density solution that meets the requirements necessary for transporting high speed digital signals.