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A compound emitter heterojunction bipolar transistor (HBT) structure that incorporates an additional heterojunction within the emitter for minority carrier confinement has been proposed. In this new device configuration, the single wide band‐gap emitter layer in a conventional HBT is replaced by two sub‐layers of wide band‐gap material, with the sub‐layer nearer the base having a narrower band‐gap. By means of numerical simulations, the compound emitter HBT was found to perform better than comparable conventional HBTs. With the AlGaAs(n) / GaAs heterostructure system, the optimum compound emitter HBT structure was found to be Al0.3Ga0.7As(n) ‐ Al0. 2Ga0.8As(n) / GaAs with grading at the two hetero‐interfaces. It has a low turn‐on voltage that is almost identical to that of a homojunction GaAs bipolar transistor with similar doping conditions. Compared with a conventional single emitter layer Al0.3Ga0.7As/GaAs HBT, the optimum compound emitter HBT has an enhancement in the current gain by approximately 2 folds, an improvement in the uniform current gain region from 2 to 4 decades of collector current density, and a slight increase in the unity‐gain cut‐off frequency fT by about 7 %.

This model is intended to simulate the large signal performance of heterojunction bipolar transistors for use in high power, high frequency, oscillators, amplifiers, and mixers. A temperature model which includes velocity overshoot and carrier energy effects has been developed. The model is used to calculate the large signal “Y” parameters of an HBT. A comparison is made between predicted power performance using the “Y” parameters and a fully numerical, time domain computation. Advantages and disadvantages of each approach are given.

An efficient numerical model of heterojunction bipolar transistor high frequency performance is proposed. The developed model is based on the ensemble Monte Carlo particle simulator. The validity and accuracy of the model are verified by comparing of the results of the model prediction with the experimental dates. The role of the thickness of the collector junction on the transistor cut‐off frequency is investigated and it is found that transistor cut‐off frequency as a function of the collector thickness has a maximum.

We present an abstract mathematical and numerical analysis for Drift‐Diffusion equation of heterojunction semiconductor devices with Fermi‐Dirac statistic. For the approximation, a mixed finite element method is considered. This can be profitably used in the investigation of the current through the device structure. A peculiar feature of this mixed formulation is that the electric displacement D and the current densities jn and jp for electrons and holes, are taken as unknowns, together with the potential φ and quas‐Fermi levels φn and φp. This enably D, jn and jp to be determined directly and accurately. For decoupled system, existence, uniqueness, regularity and stability results of the approximate solution are given. A priori and a posteriori error estimates are also presented. A nonlinear implicit scheme with local time steps is used. This algorithm appears to be efficient and gives satisfactory results. Numerical results for an heterojunction bipolar transistor, In two dimension, are presented.

This paper aims to implement a new high output power fully integrated 23.1 to 27.2 GHz gallium arsenide heterojunction bipolar transistor power amplifier (PA) to meet the stringent linearity requirements of LTE systems.

The direct input power dividing technique is used on the chip. Broadband input and output matching techniques are used for broadband Doherty operation.

The PA achieves a small-signal gain of 22.8 dB at 25.1 GHz and a saturated output power of 24.3 dBm at 25.1 GHz with a maximum power added efficiency of 31.7%. The PA occupies 1.56 mm² (including pads) and consumes a maximum current of 79.91 mA from a 9 V supply.

In this paper, the author proposed a novel direct input dividing technique with broadband matching circuits using a low Q output matching technique, and demonstrated a fully-integrated Doherty PA across frequencies of 23.1∼27.2 GHz for long term evolution-license auxiliary access (LTE-LAA) handset applications.

We present a semi‐quantum model including tunneling effects across an abrupt heterojunction. The discontinuity of the effective masses and the energy bands are considered. The quantum transmission conditions for the quasi‐Fermi levels are obtained using WKB approximation. We use mixed finite element approach and a two dimensional mesh which is double‐valued for quasi‐Fermi levels at a heterojunction. A GaAs/GaAIAs heterojunction diode is then simulated using both drift‐diffusion and semi‐quantum model by varying doping density at low temperature.

Shows how a strongly non‐linear semiconductor equation can be solved via homotopy deformation methods combined with the arclength continuation procedures. The fundamental goal of these methods is to overcome the instabilities or the failure of the classical Newton‐Raphson’s schemes which appear when the non‐linearity is strong or near limit or bifurcation points. The system, in its artificial transient form, is discretized by the non‐linear implicit scheme with local time steps. Uses the mixed finite element (MFE) approach. Presents numerical results, in two dimension, for a realistic device: an Abrupt Heterojunction Bipolar Transistor working as an amplifier.

Power amplifiers (PAs) play an important role in wireless communications because they dominate system performance. High-linearity broadband PAs are of great value for potential use in multi-band system implementation. The purpose of this paper is to present a cascode power amplifier architecture to achieve high power and high efficiency requirements for 4.2∼5.4 GHz applications.

A common emitter (CE) configuration with a stacked common base configuration of heterojunction bipolar transistor (HBT) is used to achieve high power. T-type matching network is used as input matching network. To increase the bandwidth, the output matching networks are implemented using the two L-networks.

By using the proposed method, the stacked PA demonstrates a maximum saturated output power of 26.2 dBm, a compact chip size of 1.17 × 0.59 mm² and a maximum power-added efficiency of 46.3 per cent. The PA shows a wideband small signal gain with less than 3 dB variation over working frequency. The saturated output power of the proposed PA is higher than 25 dBm between 4.2 and 5.4 GHz.

The technology adopted for the design of the 4.2-to-5.4 GHz stacked PA is the 2-µm gallium arsenide HBT process. Based on the proposed method, a better power performance of 3 dB improvement can be achieved as compared with the conventional CE or common-source amplifier because of high output stacking impedance.

High-speed Indium Phosphide (InP) HBTs have been widely used to design high-speed analog, digital and mixed-signal integrated circuits. The purpose of this study is to propose a new parameter extraction procedure for determining an improved T-topology small-signal equivalent circuit of InP heterojunction bipolar transistors (HBTs).

The alternating current crowding effect is considered through adding the intrinsic base capacitance in the small-signal equivalent circuit. All of the circuit parameters are extracted directly without using any approximation.

The extraction technique is more easily understood and clearer than other extraction methods, as the equations are derived from the S-parameters by peeling peripheral elements from small-signal models to get reduced ones and extracting each equivalent-circuit parameter using each equation.

To validate the presented parameter extraction technology, an n-p-n emitter-up InP HBT was analyzed adopting the method. Excellent agreement between measured and modeled S-parameters is obtained up to 40 GHz.

Cutoff frequency ƒT characteristics for AlGaAs/GaAs HBTs with planar structures are studied, by two‐dimensional simulation, with an emphasis placed on their dependences on the collector parameters. It is shown that the sub‐collector resistance becomes an important factor to achieve a higher ƒT in the high current region, and so it should be made as low as possible. Effects of introducing semi‐insulating external collectors are also studied. It is shown that the introduction of semi‐insulating layer is effective to improve the ƒT characteristics provided that it is slightly away from the intrinsic collector region.