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ESPE, the market leader, is a medium-sized German manufacturer of precision dental impression materials competing in a shrinking market. To grow the business, ESPE invests…
ESPE, the market leader, is a medium-sized German manufacturer of precision dental impression materials competing in a shrinking market. To grow the business, ESPE invests substantial resources in innovative impression materials and associated distribution mechanisms. Squeezed by the shrinking market, the competition is increasingly using the proprietary channels (dispensing mechanisms) and brand equity (trademark) of ESPE to maintain their market share. There is a potential infringement. Explores how ESPE is organized to execute on the options imbedded in its IP rights.
To provide students with an understanding of how to use brands and trademarks in conjunction with trade secrets, patents, and other forms of IP in mature markets to build and maintain innovation-based competitive advantage.
Quad Europe Ltd has announced the appointment of two Regional Sales Managers in the UK, Ashley Dakin and Ross Fraser who become responsible for sales of ‘Quadline’ in the South and North of the UK respectively. Ashley joins Quad Europe from Automation Ltd while Ross comes from TDK.
Wafer-level stencil printing of a type-6 Pb-free SAC solder paste was statistically evaluated at 200 and 150 μm pitch using three different stencil manufacturing…
Wafer-level stencil printing of a type-6 Pb-free SAC solder paste was statistically evaluated at 200 and 150 μm pitch using three different stencil manufacturing technologies: laser cutting, DC electroforming and micro-engineered electroforming. This investigation looks at stencil differences in printability, pitch resolution, maximum achievable bump height, print co-planarity, paste release efficiency, and cleaning frequency. The paper aims to discuss these issues.
In this paper, the authors present a statistical evaluation of the impact of stencil technology on type-6 tin-silver-copper paste printing. The authors concentrate on performances at 200 and 150 μm pitch of full array patterns. Key evaluated criteria include achievable reflowed bump heights, deposit co-planarity, paste release efficiency, and frequency of stencil cleaning. Box plots were used to graphically view print performance over a range of aperture sizes for the three stencil types.
Fabrication technologies significantly affect print performance where the micro-engineered electroformed stencil produced the highest bump deposits and the lowest bump height deviation. Second in performance was the conventional electroformed, followed by the laser-cut stencil. Comparisons between the first and fifth consecutive print demonstrated no need for stencil cleaning in the case for the micro-engineered stencil for all but the smallest spacings between apertures. High paste transfer efficiencies, i.e. above 85 per cent, were achieved with the micro-engineered stencil using low aperture area ratios of 0.5.
Stencil technology influences the maximum reflowed solder bump heights achievable, and bump co-planarity. To date, no statistical analysis comparing the impact of stencil technology for wafer-level bumping has been carried out for pitches of 200 μm and below. This paper gives new insight into how stencil technology impacts the print performance for fine pitch stencil printing. The volume of data collected for this investigation enabled detailed insight into the limitations of the printing process and as a result for suitable design guidelines to be developed. The finding also shows that the accepted industry guidelines on stencil design developed by the surface mount industry can be broken if the correct stencil technology is selected, thereby increasing the potential application areas of stencil printing.
Because of the need for electronics use at temperatures beyond 150°C, high temperature resistant interconnection technologies like transient liquid phase (TLP) soldering…
Because of the need for electronics use at temperatures beyond 150°C, high temperature resistant interconnection technologies like transient liquid phase (TLP) soldering and silver sintering are being developed which are not only replacements of high-lead solders, but also open new opportunities in terms of temperature resistance and reliability. The paper aims to address the thermo-mechanical reliability issues that have to be considered if the new interconnection technologies will be applied.
A TLP soldering technique is briefly introduced and new challenges concerning the thermo-mechanical reliability of power devices are worked out by numerical analysis (finite element simulation). They arise as the material properties of the interconnect materials differ substantially from those known for soft solders. The effective material responses of the new materials are determined by localized unit cell models that capture the inhomogeneous structure of the materials.
It is shown that both the TLP solder layer and the Ag-sinter layer have much less ductility and show less creep than conventional soft solders. The potential failure modes of an assembly made by TLP soldering or Ag sintering change. In particular, the characteristic low cycle fatigue solder failures become unlikely and are replaced either by metallization fatigue, brittle failure of intermetallic compound, components, or interfaces.
A variety of new failure risks, which have been analyzed theoretically, can be avoided only if they are known to the potential user of the new techniques. It is shown that an optimal reliability will be strongly dependent on the actual assembly design.
A screen printable, thick film dielectric materials system, for printing capacitors with Z5U thermal characteristics, has been introduced by Heraeus. IP9300 high K capacitor dielectric is a blendable materials system that permits printing capacitors onto circuits with precise values over a wide range of dielectric constants from K = 3000 to K = 500. It is applied with conventional thick film screening techniques and fired at 850°C. This system is also compatible with some of Heraeus' thick film conductor materials and low temperature overglaze.