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Article
Publication date: 21 April 2022

Myeongjin Kim and Joo Hyun Moon

This study aims to introduce a deep neural network (DNN) to estimate the effective thermal conductivity of the flat heat pipe with spreading thermal resistance.

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Abstract

Purpose

This study aims to introduce a deep neural network (DNN) to estimate the effective thermal conductivity of the flat heat pipe with spreading thermal resistance.

Design/methodology/approach

A total of 2,160 computational fluid dynamics simulation cases over up to 2,000 W/mK are conducted to regress big data and predict a wider range of effective thermal conductivity up to 10,000 W/mK. The deep neural networking is trained with reinforcement learning from 10–12 steps minimizing errors in each step. Another 8,640 CFD cases are used to validate.

Findings

Experimental, simulational and theoretical approaches are used to validate the DNN estimation for the same independent variables. The results from the two approaches show a good agreement with each other. In addition, the DNN method required less time when compared to the CFD.

Originality/value

The DNN method opens a new way to secure data while predicting in a wide range without experiments or simulations. If these technologies can be applied to thermal and materials engineering, they will be the key to solve thermal obstacles that many longing to overcome.

Details

International Journal of Numerical Methods for Heat & Fluid Flow, vol. 33 no. 2
Type: Research Article
ISSN: 0961-5539

Keywords

Article
Publication date: 1 January 1991

T.S. LEE

Heat and fluid flow through a trapezoidal cooling chamber were studied numerically. Hot fluid is assumed inflow at some depth below the surface into one end of the chamber and…

Abstract

Heat and fluid flow through a trapezoidal cooling chamber were studied numerically. Hot fluid is assumed inflow at some depth below the surface into one end of the chamber and withdrawn at another depth from the other end. The top of the chamber is exposed to the surrounding for cooling and the remaining side‐walls are all insulated. Inflow Reynolds number Ro considered is in the range of 100 to 1000 and the inlet densimetric Froude number Fo considered is in the range of 0.5 to 50.0. Numerical experiments show that the flow and temperature fields in the flow‐through trapezoidal chamber are strong function of both Fo and Ro. The submergence ratio D/do, chamber length to depth ratio L/D and chamber wall angles are also significant in influencing the flow fields. Comparisons were also made with available experimental and prototype data.

Details

International Journal of Numerical Methods for Heat & Fluid Flow, vol. 1 no. 1
Type: Research Article
ISSN: 0961-5539

Keywords

Article
Publication date: 6 November 2017

Eric Monier-Vinard, Brice Rogie, Valentin Bissuel, Najib Laraqi, Olivier Daniel and Marie-Cécile Kotelon

Latest Computational Fluid Dynamics (CFDs) tools allow modeling more finely the conjugate thermo-fluidic behavior of a single electronic component mounted on a Printed Wiring…

Abstract

Purpose

Latest Computational Fluid Dynamics (CFDs) tools allow modeling more finely the conjugate thermo-fluidic behavior of a single electronic component mounted on a Printed Wiring Board (PWB). A realistic three-dimensional representation of a large set of electric copper traces of its composite structure is henceforth achievable. The purpose of this study is to confront the predictions of the fully detailed numerical model of an electronic board to a set of experiment results to assess their relevance.

Design/methodology/approach

The present study focuses on the case of a Ball Grid Array (BGA) package of 208 solder balls that connect the component electronic chip to the Printed Wiring Board. Its complete geometrical definition has to be coupled with a realistic board layers layout and a fine description of their numerous copper traces to appropriately predict the way the heat is spread throughout that multi-layer composite structure. The numerical model computations were conducted on four CFD software then compare to experiment results. The component thermal metrics for single-chip packages are based on the standard promoted by the Joint Electron Device Engineering Council (JEDEC), named JESD-51. The agreement of the numerical predictions and measurements has been done for free and forced convection.

Findings

The present work shows that the numerical model error is lower than 2 per cent for various convective boundary conditions. Moreover, the establishment of realistic numerical models of electronic components permits to properly apprehend multi-physics design issues, such as joule heating effect in copper traces. Moreover, the practical modeling assumptions, such as effective thermal conductivity calculation, used since decades, for characterizing the thermal performances of an electronic component were tested and appeared to be tricky. A new approach based on an effective thermal conductivity matrix is investigated to reduce computation time. The obtained numerical results highlight a good agreement with experimental data.

Research limitations/implications

The study highlights that the board three-dimensional modeling is mandatory to properly match the set of experiment results. The conventional approach based on a single homogenous layer using effective thermal conductivity calculation has to be banned.

Practical implications

The thermal design of complex electronic components is henceforth under increasing control. For instance, the impact of gold wire-bonds can now be investigated. The three-dimensional geometry of sophisticated packages, such as in BGA family, can be imported with all its internal details as well as those of its associated test board to build a realistic numerical model. The establishment of behavioral models such as DELPHI Compact Thermal Models can be performed on a consistent three-dimensional representation with the aim to minimize computation time.

Originality/value

The study highlights that multi-layer copper trace plane discretization could be used to strongly reduce computation time while conserving a high accuracy level.

Details

International Journal of Numerical Methods for Heat & Fluid Flow, vol. 27 no. 11
Type: Research Article
ISSN: 0961-5539

Keywords

Article
Publication date: 3 January 2017

Nhat Minh Nguyen, Eric Monier-Vinard, Najib Laraqi, Valentin Bissuel and Olivier Daniel

The purpose of this paper is to supply an analytical steady-state solution to the heat transfer equation permitting to fast design investigation. The capability to efficiently…

Abstract

Purpose

The purpose of this paper is to supply an analytical steady-state solution to the heat transfer equation permitting to fast design investigation. The capability to efficiently transfer the heat away from high-powered electronic devices is a ceaseless challenge. More than ever, the aluminium or copper heat spreaders seem less suitable for maintaining the component sensitive temperature below manufacturer operating limits. Emerging materials, such as annealed pyrolytic graphite (APG), have proposed a new alternative to conventional solid conduction without the gravity dependence of a heat-pipe solution.

Design/methodology/approach

An APG material is typically sandwiched between a pair of aluminium sheets to compose a robust graphite-based structure. The thermal behaviour of that stacked structure and the effect of the sensitivity of the design parameters on the effective thermal performances is not well known. The ultrahigh thermal conductivity of the APG core is restricted to in-plane conduction and can be 200 times higher than its through-the-thickness conductivity. So, a lower-than-anticipated cross-plane thermal conductivity or a higher-than-anticipated interlayer thermal resistance will compromise the component heat transfer to a cold structure. To analyse the sensitivity of these parameters, an analytical model for a multi-layered structure based on the Fourier series and the superposition principle was developed, which allows predicting the temperature distribution over an APG flat-plate depending on two interlayer thermal resistances.

Findings

The current work confirms that the in-plane thermal conductivity of APG is among the highest of any conduction material commonly used in electronic cooling. The analysed case reveals that an effective thermal conductivity twice as higher than copper can be expected for a thick APG sheet. The relevance of the developed analytical approach was compared to numerical simulations and experiments for a set of boundary conditions. The comparison shows a high agreement between both calculations to predict the centroid and average temperatures of the heating sources. Further, a method dedicated to the practical characterization of the effective thermal conductivity of an APG heat-spreader is promoted.

Research limitations/implications

The interlayer thermal resistances act as dissipation bottlenecks which magnify the performance discrepancy. The quantification of a realistic value is more than ever mandatory to assess the APG heat-spreader technology.

Practical implications

Conventional heat spreaders seem less suitable for maintaining the component-sensitive temperature below the manufacturer operating limits. Having an in-plane thermal conductivity of 1,600 W.m−1.K−1, the APG material seems to be the next paradigm for solving endless needs of a thermal designer.

Originality/value

This approach is a practical tool to tailor sensitive parameters early to select the right design concept by taking into account potential thermal issues, such as the critical interlayer thermal resistance.

Details

International Journal of Numerical Methods for Heat & Fluid Flow, vol. 27 no. 1
Type: Research Article
ISSN: 0961-5539

Keywords

Article
Publication date: 3 May 2016

Sangbeom Cho, Venky Sundaram, Rao Tummala and Yogendra Joshi

The functionality of personal mobile electronics continues to increase, in turn driving the demand for higher logic-to-memory bandwidth. However, the number of inputs/outputs…

265

Abstract

Purpose

The functionality of personal mobile electronics continues to increase, in turn driving the demand for higher logic-to-memory bandwidth. However, the number of inputs/outputs supported by the current packaging technology is limited by the smallest achievable electrical line spacing, and the associated noise performance. Also, a growing trend in mobile systems is for the memory chips to be stacked to address the growing demand for memory bandwidth, which in turn gives rise to heat removal challenges. The glass interposer substrate is a promising packaging technology to address these emerging demands, because of its many advantages over the traditional organic substrate technology. However, glass has a fundamental limitation, namely low thermal conductivity (∼1 W/m K). The purpose of this paper is to quantify the thermal performance of glass interposer-based electronic packages by solving a multi-scale heat transfer problem for an interposer structure. Also, this paper studies the possible improvement in thermal performance by integrating a fluidic heat spreader or vapor chamber within the interposer.

Design/methodology/approach

This paper illustrates the multi-scale modeling approach applied for different components of the interposer, including Through Package Vias (TPVs) and copper traces. For geometrically intricate and repeating structures, such as interconnects and TPVs, the unit cell effective thermal conductivity approach was used. For non-repeating patterns, such as copper traces in redistribution layer, CAD drawing-based thermal resistance network analysis was used. At the end, the thermal performance of vapor chamber integrated within a glass interposer was estimated by using an enhanced effective thermal conductivity, calculated from the published thermal resistance data, in conjunction with the analytical expression for thermal resistance for a given geometry of the vapor chamber.

Findings

The limitations arising from the low thermal conductivity of glass can be addressed by using copper structures and vapor chamber technology.

Originality/value

A few reports can be found on thermal performance of glass interposers. However thermal characteristics of glass interposer with advanced cooling technology have not been reported.

Details

International Journal of Numerical Methods for Heat & Fluid Flow, vol. 26 no. 3/4
Type: Research Article
ISSN: 0961-5539

Keywords

Article
Publication date: 1 April 1991

D.J. Dean

This paper explains why the data with which thermal designers have to work is uncertain and incomplete. It then describes how accepting this uncertainty unlocks the shackles of…

Abstract

This paper explains why the data with which thermal designers have to work is uncertain and incomplete. It then describes how accepting this uncertainty unlocks the shackles of accurate temperature prediction and gives the designer the freedom to tackle the different aspects of thermal design at an appropriate and simple level. The latter part of the paper concentrates on the thermal design of circuit boards, first for steady state and then for transient operation.

Details

Circuit World, vol. 18 no. 1
Type: Research Article
ISSN: 0305-6120

Article
Publication date: 1 March 1950

H.B. Squire

The data on round jets in still air and in a general stream are analysed to determine the spread of the jet and the decay of the axial velocity distribution. The temperature…

Abstract

The data on round jets in still air and in a general stream are analysed to determine the spread of the jet and the decay of the axial velocity distribution. The temperature distributions for heated jets are treated in the same way. Methods of model test technique for jets and jet aircraft are discussed; it is shown that the jet momentum is the most important quality in the representation of hot jets. Illustrations of the effect of jets on neighbouring surfaces, including the Coanda effect, are given, and finally an examination of the effect of jets on aircraft stability is made.

Details

Aircraft Engineering and Aerospace Technology, vol. 22 no. 3
Type: Research Article
ISSN: 0002-2667

Article
Publication date: 1 March 1994

H. Hashemi, M. Olla, C. Spooner and D. Walshak

This paper explores the enabling technologies and thermal performance trade‐offs associated with inserting small multichip modules (MCMs) into surface mount packages. Using…

Abstract

This paper explores the enabling technologies and thermal performance trade‐offs associated with inserting small multichip modules (MCMs) into surface mount packages. Using assembly and interconnect technologies available today, ‘few‐chip’ packages can lead to less costly solutions than traditional single chip package approaches, and may be practical depending on system size and modularity constraints. The key enabling technologies required include fine‐line interconnect substrate technology, direct leadframe attachment and chip bonding to fine‐line laminate substrates, the moulding of large substrates with multiple components in a thin surface mount package, and cost‐effective cooling techniques. The thermal performance of a moulded few‐chip package is analysed and cooling methods are discussed. A screening experiment was performed in which several geometric and material parameters were studied to determine their impact on thermal performance. The size of the heat slugs appears to be the variable with the greatest effect on thermal performance. The effects of external board size, board material and the design of the internal substrate on the thermal performance of a few‐chip packaqe are also discussed.

Details

Circuit World, vol. 20 no. 4
Type: Research Article
ISSN: 0305-6120

Article
Publication date: 1 March 1988

R.C. Estes

As requirements for system performance and density increase, more attention is being given to chip‐on‐board (COB) packaging techniques. COB is ‘surface mount packaging taken to…

Abstract

As requirements for system performance and density increase, more attention is being given to chip‐on‐board (COB) packaging techniques. COB is ‘surface mount packaging taken to the extreme’ as it involves the direct mounting of bare semiconductor die to printed circuit board substrates. In this paper, the ‘thermal resistance’ of a single COB package is proposed. An analytical model for this resistance is developed for a multilayer board configuration using a combination of Fourier transform and adjoint‐solution techniques. Parameters in the model include the chip and board geometric parameters, individual layer unit conductances, and top and bottom surface film coefficients. A series of curves are developed from the model. These curves may be used in the initial design process to determine, for example, required film coefficients and the efficacy of adding thermal planes to the board. The model is also used to test the adequacy of the ‘effective series conductivity’ of a multilayer board.

Details

Microelectronics International, vol. 5 no. 3
Type: Research Article
ISSN: 1356-5362

Article
Publication date: 1 January 1988

C. Cognetti, E. Stroppolo and R. Tiziani

This paper addresses the themes of resistance to soldering heat and heat dissipation as aspects of reliability in relation to surface mounted devices soldered on a plastic…

Abstract

This paper addresses the themes of resistance to soldering heat and heat dissipation as aspects of reliability in relation to surface mounted devices soldered on a plastic substrate by the most common industrial processes. Reliability data are presented for devices soldered by double wave, multiple wave, vapour phase and infra‐red processes and comments given on the reliability results. In terms of heat dissipation, using an internally developed test pattern and suitable test boards, a study was made of the influence of the substrate on thermal dissipation, thermal impedance, and new medium power SO and PLCC packages offering the possibility of cost‐effective power dissipation in the range of 1.5–2 W while still maintaining a standard outline.

Details

Microelectronics International, vol. 5 no. 1
Type: Research Article
ISSN: 1356-5362

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