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The purpose of this paper is to design a suitable guard trace to reduce the electromagentic interference between two closely spaced high frequency transmission lines. A novel cross-shaped resonator combined via fence is passed down to alleviate far-end and near-end crosstalk (NEXT) in tightly coupled high-speed transmission lines. The distance between the adjacent transmission lines is increased stepwise as a function of trace width.

A rectangular-shaped resonator via fence is connected by a guard trace has been proposed to overcome the coupling between the traces that is separated by 2 W. Similarly, by creating a cross-shaped resonator via fence connected by guard trace that reduces the spacing further by 1.5 W.

A tightly coupled transmission line structure that needs separation by a designed unit cell structure. Further research needs to be conducted to improve the NEXT, far-end crosstalk (FEXT) and spacing between the transmission lines.

This study portrays a novel method that combines the resonators via fence with a minimum spacing between the tightly coupled transmission lines which reduce the NEXT and FEXT; thereby reducing the size of the routing area. The resultant test structures are characterized at high frequencies using time domain and frequency domain analysis. The following scattering parameters such as insertion loss, NEXT and FEXT of the proposed method are measured as 1.504 dB, >30 dB and >20 dB, respectively.

Surface insulation resistance (SIR) testing is used in a number of ways to characterise residues or determine the effect of residues on the performance of printed wiring boards (PWBs) and assemblies (PWAs). Stated simply, SIR testing is the measurement of leakage currents on or in a substrate, usually during exposure to elevated temperature and humidity conditions, for a varying amount of exposure time. An examination of the resistance trends over time, and occurrences of metal migration and/or corrosion, can determine the potential threats of compatibility problems with circuit card assembly materials. This paper examines how SIR testing is used in various areas, with an emphasis on the design of the SIR test vehicle. With the advent of ANSI‐J‐STD‐001B, more companies will need to design their own test vehicle for process qualification.

The purpose of this paper is to explain the growing importance of design for assembly (DFA) and design for test (DFT) for compact medical electronics products.

The paper discusses compact products based on leading‐edge electronic components such as digital signal processors, radio frequency (RF) and mixed‐signal chips, advanced ball‐grid array, quad flat pack, chip scale package devices.

Advanced technologies like these create higher component and joint counts and increasing PCB densities. A higher probability of defects and faults is created, which lead to lower yields for a specific product line unless proper effective DFA and DFT are implemented.

The paper details DFA, high‐speed PCB design, mixed‐signal design, and DFT.

With increasing complexity in compact medical products, it is prudent to emphasize DFA and DFT for ultimate reliability during product development and production cycles.

ONCE upon a time—admittedly many years ago—a working man sneered at his son who wished he might go on to a University: “Education and a penny will buy you a loaf”. The inference was that without the penny the boy would starve.

The design, fabrication and experimental validation of defected microstrip structure (DMS) are proposed to address the problem of near-end crosstalk (NEXT) and far-end crosstalk (FEXT) between the microstrip transmission lines in a printed circuit board.

The proposed DMS evolved with the combination of spur line (L-shaped DMS) and U-shaped DMS topologies. This technique reduces the strength of electromagnetic coupling and suppresses crosstalk by optimizing the capacitive and inductive coupling ratio between the linked microstrip lines. The practical inductance value is much more significant in DMS than in defected ground structures (DGS), but the capacitance value remains the same.

A DMS unit is etched on the aggressor microstrip line instead of the DGS circuit. Because there is no leakage via the ground plane and the circuit size is far smaller than with DGS, the enclosure issue is disregarded. DMS structures have a larger effective inductance and are resistant to electromagnetic interference. A tightly coupled transmission line structure with minimal separation between the coupled microstrip line is designed using DMS. Further research must be conducted to improve the NEXT, FEXT and spacing between the transmission lines.

Simulation and actual measurement results show that the proposed DMS structure can effectively suppress crosstalk by analysing the S-parameters, namely, S_12, S_13 and S_14, with measured values of 1.48 dB, 20.65 dB and 21.099 dB, respectively. The data rate is measured to be 1.34 Gbps as per the eye diagram characterization. The results show that the NEXT and FEXT are reduced by approximately 20 dB in the frequency range of 1–11 GHz for mixed signals. The substantial measured results in the vector network analyser coincide with the computer simulation technology microwave studio suite simulation results.

This paper aims to address formal testing of real‐time systems by providing readers with guidance for generating test cases from timed automata.

In this paper, a set of test selection criteria is presented. Such criteria are useful for testing real‐time systems specified by timed automata. The criteria are introduced after the presentation of timed automata model and the concepts related to it.

The paper finds that the set of test selection criteria are ordered based on the inclusion relation. The ordering is useful for developing new testing methods and for comparing existing approaches.

Each of the proposed test selection criteria can be used to develop a new method for testing timed automata with certain fault coverage.

Differing from previous studies trying to solve the electromagnetic compatibility (EMC) issue by addressing single factor, this study aims to combine measures of shielding, filtering and grounding to design parameters with the Taguchi method at the beginning of product design to come up with the optimal parameter combination.

EMC-related performance such as radiated emission, conduction interference and electrical fast transient/burst immunity (EFT) are response variables, whereas the printed circuit board and mechanic design-relevant parameters are considered as control factors. The noise factors are peripherals used together with the tablet.

The optimal design parameter matrix based on results from the application and integration of multivariate analysis method of principal component grey relation and technique for order preference by similarity to ideal solution suggests 14 grounding screw holes, cooling aperture of casing at diameter of 3 mm and staggered layout and 300O filter located at source of noise. Validation of this matrix shows around 10, 1 and 8 per cent improvement in radiation, conduction interference and EFT immunity.

The multivariate quality parameters’ design method proposed by this study improves EMC characteristics of products and meets the design specification required by customer, accelerating electronic product research and development process and complying with electromagnetic interference test regulations set forth by individual country.

The purpose of this paper is to demonstrate that process mining techniques can help to discover process models from event logs, using conventional high-level process modeling languages, such as Business Process Model and Notation (BPMN), leveraging their representational bias.

The integrated discovery approach presented in this work is aimed to mine: control, data and resource perspectives within one process diagram, and, if possible, construct a hierarchy of subprocesses improving the model readability. The proposed approach is defined as a sequence of steps, performed to discover a model, containing various perspectives and presenting a holistic view of a process. This approach was implemented within an open-source process mining framework called ProM and proved its applicability for the analysis of real-life event logs.

This paper shows that the proposed integrated approach can be applied to real-life event logs of information systems from different domains. The multi-perspective process diagrams obtained within the approach are of good quality and better than models discovered using a technique that does not consider hierarchy. Moreover, due to the decomposition methods applied, the proposed approach can deal with large event logs, which cannot be handled by methods that do not use decomposition.

The paper consolidates various process mining techniques, which were never integrated before and presents a novel approach for the discovery of multi-perspective hierarchical BPMN models. This approach bridges the gap between well-known process mining techniques and a wide range of BPMN-complaint tools.