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The circuit elements of every printed circuit board have the potential for failure during test and/or use. These failures can occur by forming short‐circuits between adjacent circuit elements, or by forming open‐circuits in the conductors. The risk sites can be identified by type, and the total number enumerated by manual inspection of the photolithographic masks used to fabricate the printed circuit layers. However, the circuit density of high performance printed circuit boards has become so great that meaningful manual analysis has become impractical. A more effective method is to use special graphics programs to analyse the computer‐aided design (CAD) data. The methodology developed to perform the CAD analysis of high performance printed circuit boards for short‐circuits utilises two powerful computer graphic tools: the Interactive Graphics System and the Unified Shapes Checking system. Test data for open‐circuits are generated using specially written alphanumeric routines. The data can be used for stress testing the printed circuit boards by wiring up special test modules that are plugged into the boards and then placing the boards into environmental test chambers. The printed circuits are checked for short‐circuits by putting them into groups that have no risk of shorting to each other (zero risk), and placing the groups in parallel under an electrical potential. The flow of current between the groups would indicate a short‐circuit. Similarly, the printed circuits can be checked for open‐circuits, by stringing them together into groups in series, and measuring the changes in resistance under thermal stress. Both types of test data can also be used for in‐process testing.

On the only rainy day of a week in early March, a yellow Rolls Royce pulled up outside a substantial house in North London, the home of Dr Paul Eisler, the inventor of the foil method of printed circuit manufacture. The occasion was the presentation to him of the Graphic Electronics Achievement Award in recognition of his work on the printed circuit.

PMD have appointed David H. Ormerod to the position of printed circuits products manager as part of their marketing organisation.

Close spacing of conductors, surface mounted components and a multiplicity of DIPs have rendered the use of heat sinks on the PC board surface more and more hazardous. Where exposure to extreme temperatures is likely, the bond of heat sinks to the board has failed in 8% of cases during a recent investigation. Using the techniques described in this paper, any company with a multilayer manufacturing capability can produce a printed circuit board with good thermal conductivity and expansion characteristics related to most component mounting devices.

To meet the ever increasing quality standard set by the manufacturers of multilayer printed circuit boards, IMASA, in association with Enthone Inc. USA, has further developed the Enplate MLB permanganate etch back system to improve the hole quality of a multilayer printed circuit board. To enable manufacturers to utilise this improvement using existing equipment, Short Line Chemistry was developed.

An abridged version of the previously unpublished writings of Paul Eisler, universally acknowledged as the inventor of the printed circuit board and many other technical innovations, will be presented in Circuit World in three parts. The content of the extracts will concentrate mainly on Dr Eisler's efforts in the field of printed circuit technology, followed by a few details of some of his other areas of invention.

This paper aims to demonstrate the practicability of the liquid metal printer, developed in the authors’ laboratory, in the direct manufacture and assembly of circuit boards at the end customer side using GaIn24.5 alloy as printing ink at room temperature.

A practical procedure for printing a real designed frequency modulation (FM) radio circuit on flexible and transparent substrate using liquid metal printer was established. Necessary electronic components are then assembled on this circuit board. To enhance the mechanical stability of the FM radio circuit board, we further package the circuit board using room temperature vulcanizing silicone rubber. Finally, an efficient way to recycle the liquid metal ink and electronic components is presented at the end of circuit board’s life cycle.

Methods of designing the circuit patterns that are applicable to liquid metal printer are similar to the conventional printed circuit board (PCB) designing strategies. The procedure of applying liquid metal printer for printing the circuits is entirely automatic, cost-effective and highly time-saving, which allows the user to print out desired device in a moment. Through appropriate packaging, the FM radio circuit board can be flexibly used. These PCBs own many outstanding merits including easy modification and stretchability. Nearly all liquid metal ink and components can be recycled.

The present end-customer-oriented liquid metal printing opens the way for large-scale personal electronics manufacture which is expected to initiate many emerging applications in education, design, industry, entertainment and more maker targets.

W. Canning Materials Ltd have announced the appointment of Mr W. E. I. Galloway as Managing Director with effect from 1st January, 1985. The Company is a leading manufacturer and supplier of industrial and speciality chemicals for the surface finishing industry.

It is reasoned that wide penetration of chip carriers into equipment for professional and commercial applications depends on developing methods for mounting the leadless types directly on to conventional polymer type printed circuit boards. The main problem to be overcome is fatigue failure of the solder joints due to the mismatch in thermal expansion, evidenced by poor thermal cycling performance. In this paper the thermal cycling performance is compared when four sizes of ceramic leadless chip carrier are mounted on a selection of printed circuit board materials ranging from the conventional to those specially formulated, either on the basis of matching the coefficient of thermal expansion of the chip carrier material, or to provide a layer of compliant elastomer material underneath the layer bearing the copper contact layer, so that strain due to thermal expansion mismatch is not transmitted to the solder layer. Over 400 thermal cycles (−55 to + 125°C) were recorded using proprietary versions of elastomer coated substrates. For appropriate applications the basis is thus laid for an economic and technically acceptable solution. The practical implications of two methods of soldering—wave (jet) and vapour phase—are also discussed.