Search results

Three common glob top encapsulant materials, two epoxy‐based, and one silicone‐based, were characterized prior to temperature cycling using differential scanning calorimetry (DSC), thermogravimetric analysis (TGA), dynamic mechanical spectroscopy (DMS), gas chromatograph‐mass spectrometry (GC‐MS), and Fourier transform infrared spectroscopy (FTIR). After cycling between ‐55 to +125°C, for 1,000 cycles, the same samples were again analysed using DMS and FTIR. For the epoxy‐based samples, the DMS results indicated that temperature cycling in a humid environment can seriously affect the physical and mechanical properties of these samples. FTIR data also indicated that the molecular changes in the epoxy‐based samples appeared quite extensive after cycling, indicating a high level of degradation on the molecular scale. On the other hand, the silicon‐based glob top appeared to have survived the temperature cycling quite well.

Novel epoxy formulations have been developed for microelectronic packaging applications. The resin compositions are based on cycloaliphatic esters and proprietary epoxies, which possess excellent thermal and electrical stability. The key features of these materials are short cure cycle, long‐term stability at 25°C, very low cure volatile, low moisture absorption, low coefficient of thermal expansion (CTE), and excellent adhesion to various substrates. In addition, the change in CTE below and above the glass transition temperature of the polymers is minimal. This unique behaviour is attributed to the interpenetrating network‐like (IPN) structure of the base resin composition. Further evidence of the IPN structure is the broad loss modulus and tan δ observed between −150°C and +150°C in dynamic mechanical tests. The extensive curing reaction yields a high crosslink density polymer network, resulting in good moisture resistance (<0.2% after 14 days in 85°C/85%RH) and thermal stability (<0.3 wt % at 300 °C of the cured material). The extent of cure has been studied in a dynamic scanning calorimeter (DSC) by following the extent of post‐cure exotherm. Both in the accelerated and non‐accelerated systems, the curing is complete in a single step with no post curing required. Cure cycles used range from 1 hour at 140°C to about 1 minute at 170°C. Currently, cure stresses, fracture toughness (bulk and interfacial), fatigue life, and various reliability tests are being performed to characterise the underfill, glob top encapsulants, and die‐attach adhesives.

Liquid encapsulation techniques have been used extensively in advanced semiconductor packaging, including applications of underfilling, cavity‐filling, and glob top encapsulation. Because of the advanced encapsulation materials and the automatic liquid dispensing equipment involved, it is very important to understand the encapsulation material characteristics, equipment characteristics, encapsulation process development techniques in order to achieve the encapsulation quality and reliability. In this paper, the authors will examine the various considerations in liquid encapsulation applications and address the concerns on material characterization, automatic liquid dispensing equipment/process characterization and the encapsulation quality and reliability. The discussions will be helpful for future material and process development of semiconductor packages.

The encapsulation of electronic assemblies within thermoplastic polymers is an attractive technology for the protection of circuitry used in harsh environments, such as those experienced in automotive applications. However, the relatively low‐thermal conductivity of the encapsulating polymer will introduce a thermally insulating barrier, which will impact on the dissipation of heat from the components and may result in the build‐up of stresses in the structure. This paper therefore seeks to present the results from computational models used to investigate the thermal and thermo‐mechanical issues arising during the operation of such electronic modules. In particular, a two‐shot overmoulded structure comprising an inner layer of water soluble and an outer layer of conventional engineering thermoplastics was investigated, due to this type of structure's potential to enable the easy separation of the electronics from the polymer at the end‐of‐life for recycling.

Representative finite element models of the overmoulded electronic structures were constructed and the effects of the polymer overmould were analysed through thermal and thermo‐mechanical simulations. Investigations were also carried out to explore the effect of materials properties on the overmoulded structure.

Models have shown that some power de‐rating of components is required to prevent temperatures exceeding those in unencapsulated circuits and have quantified the benefits of adding thermally conductive fillers to the polymer. Simulations have also clearly demonstrated the benefits of foamed polymers in reducing thermal stresses in the assemblies, despite their poorer thermal conductivity compared with solid polymers.

The paper illustrates the thermal issues affecting the overmoulded electronics and gives some guidelines for improving their performance.

Light radiation cure adhesives, coatings and encapsulants are being used in the electronics manufacturing industry with increasing frequency because their properties and process advantages are a good fit for the manufacturing requirements which are demanded by current industry drivers, such as miniaturisation, environmental and health & safety demands, manufacturing yield improvement and total product cost. Light curing adhesive systems in the electronics manufacturing industry have found applications in strain relief, wire and parts tacking, coil terminating, tamper‐proofing, structural bonding, temporary masking, potting, encapsulation, glob topping, conformal coating, and surface mount component attachment. This paper describes three case histories where photo cure adhesives were introduced to an electronics manufacturing environment, and discusses their rationale, implementation and their economics. The case histories encompass printed circuit board assembly (including surface mount), electronics packaging and microelectronic encapsulation. Production managers and process engineers are given confidence that practical adhesive application can be clean, fast and economical.

Reviews the traditional use of thermoset (epoxy) adhesives for various bonding applications and highlights some limitations in today’s microelectronics arena. In particular, concerns for thermal and stress management associated with large area silicon bonded to a wide variety of substrate materials has led to an increasing interest in thermoplastic adhesive technology. Thermoplastics are not always the best solution for every application. This paper sets out to address the “pros and cons” of each polymer technology for different microelectronic applications taking into account some of the key physical properties such as Tg, TCE and modulus. In addition, practical issues such as handling, storage and processing are considered in detail.

The purpose of this paper is to demonstrate a novel 3D system-in-package (SiP) approach. This new packaging approach is based on stacked silicon submount technology. As demonstrators, a smart lighting module and a sensor systems were successfully developed by using the fabrication and assembly process described in this paper.

The stacked module consists of multiple layers of silicon submounts which can be designed and fabricated in parallel. The 3D stacking design offers higher silicon efficiency and miniaturized package form factor. This platform consists of silicon submount design and fabrication, module packaging, system assembling and testing and analyzing.

In this paper, a smart light emitting diode system and sensor system will be described based on stacked silicon submount and 3D SiP technology. The integrated smart lighting module meets the optical requirements of general lighting applications. The developed SiP design is also implemented into the miniaturization of particular matter sensors and gas sensor detection system.

SiP has great potential of integrating multiple components into a single compact package, which has potential implementation in intelligent applications.

The increase in semiconductor integration level has led to complex Integrated Circuits (ICs) characterised by an increasing number of I/O, such that dies with 40 to 84 metallised pads are currently manufactured and frequently used in modern electronic systems. The advent from 1980 onwards of these LSI‐VLSI semiconductors requires new economical micropackages to be devised that can be adapted to surface mounting techniques on Hybrid Integrated Circuits (HICs) and Printed Circuits Boards (PCBs). Plastic encapsulation using a transfer moulded epoxy resin is a widely used method for packaging silicon devices because of the reduced manufacturing cost for large volumes. This economic criterion, which is considered with widespread interest in the electronics industry, has recently led the major semiconductor manufacturers to produce Plastic Leaded Chip Carriers (PLCCs) with up to 84 J bend connections on 1·27 mm pitch, and Mini Quad Packs with 40 to 84 Z bend pins on 0·75∼0·80mm centres. However, until now, a significant number of ICs, such as full custom circuits, are not yet available in any packaged form. Thus, in order to take advantage of the compactness offered by micropackages without being under component manufacturers' constraints for packaged LSI needs, it was decided at the Microelectronics Division of CIT‐Alcatel to develop a flexible semiconductor encapsulation technology which does not require any moulding equipment. The process involved has led to the development of a small economical package with 52 peripheral Z bend leads on 0·75 mm centres which has been evaluated. This original LSI carrier, named Plastic Composite Package (PCP) because of its special feature, is perfectly suited to the specific needs of multilayer HICs for all non‐military applications. In addition, another PCP format with 68 pins on 0·635 mm centres, designed for LSI Industrial applications, has been investigated. The purpose of this paper is to explain the specific needs in the hybrid industry and to give the authors' views on trends in LSI‐VLSI plastic encapsulation. Moreover, the PCP manufacturing process is described, the evaluation results being discussed as well as the economic aspect.

This study aims to provide a flexible and cost-effective solution of 3D heterogeneous integration for applications such as micro-electro-mechanical system (MEMS) applications and smart sensor systems.

A novel 3D system-in-package (SiP) based on stacked silicon submount technology was successfully developed and well-demonstrated by the fabrication and assembly process of a selected smart lighting module.

The stacked module consists of multiple layers of silicon submounts which can be designed and fabricated in parallel. The bonding and interconnecting process is quite simple and does not require complicated equipment. The 3D stacking design offers higher silicon efficiency and miniaturized package form factor. The submount wafer can be assembled and tested at the wafer level, thus reducing the cost and improving the yield.

The embedding design presented in this paper is applicable for modules with limited number of passives. When it comes to cases with more passive devices, new process needs to be developed to achieve fast, inexpensive and reliable assembly.

The presented 3D SiP design is novel for applications such as smart lighting, Internet of Things, MEMS systems, etc.