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High packaging density in the present VLSI era builds an acute power crisis, which limits the use of MOSFET device as a constituent block in CMOS technology. This leads researchers in looking for alternative devices, which can replace the MOSFET in CMOS VLSI logic design. In a quest for alternative devices, tunnel field effect transistor emerged as a potential alternative in recent times. The purpose of this study is to enhance the performances of the proposed device structure and make it compatible with circuit implementation. Finally, the performances of that circuit are compared with CMOS circuit and a comparative study is made to find the superiority of the proposed circuit with respect to conventional CMOS circuit.

Silicon–germanium heterostructure is currently one of the most promising architectures for semiconductor devices such as tunnel field effect transistor. Analytical modeling is computed and programmed with MATLAB software. Two-dimensional device simulation is performed by using Silvaco TCAD (ATLAS). The modeled results are validated through the ATLAS simulation data. Therefore, an inverter circuit is implemented with the proposed device. The circuit is simulated with the Tanner EDA tool to evaluate its performances.

The proposed optimized device geometry delivers exceptionally low OFF current (order of 10^−18 A/um), fairly high ON current (5x10^−5 A/um) and a steep subthreshold slope (20 mV/decade) followed by excellent ON–OFF current ratio (order of 10^13) compared to the similar kind of heterostructures. With a very low threshold voltage, even lesser than 0.1 V, the proposed device emerged as a good replacement of MOSFET in CMOS-like digital circuits. Hence, the device is implemented to construct a resistive inverter to study the circuit performances. The resistive inverter circuit is compared with a resistive CMOS inverter circuit. Both the circuit performances are analyzed and compared in terms of power dissipation, propagation delay and power-delay product. The outcomes of the experiments prove that the performance matrices of heterojunction Tunnel FET (HTFET)-based inverter are way ahead of that of CMOS-based inverter.

Germanium–silicon HTFET with stack gate oxide is analytically modeled and optimized in terms of performance matrices. The device performances are appreciable in comparison with the device structures published in contemporary literature. CMOS-like resistive inverter circuit, implemented with this proposed device, performs well and outruns the circuit performances of the conventional CMOS circuit at 45-nm technological node.

The purpose of this study is the synthesis and characterization of a CMYK palette (cyan of Cr-BiVO₄, magenta of Pr-CeO₂, yellow of Bi-(Ce,Zr)O₂ composite and black of YMnO₃) as an eco-friendly polyfunctional palette that combines (a) high near-infrared reflectance (cool pigments) that allows moderate temperatures in indoor environments and the urban heat island effect; (b) photocatalytic activity for the degradation of organic contaminants of emerging concern of substrates in solution (such as Orange II or methylene blue) and gaseous (NO_x and volatile organic compounds such as acetaldehyde or toluene); (c) X-ray radiation attenuators associated with bismuth ions; and (d) biocidal effect combined with co-doping with bactericidal agents.

Pigments were prepared by a solid-state reaction and characterized by X-ray diffraction, diffuse reflectance spectroscopy, photocatalytic activity over Orange II and scanning electron microscopy.

The behaviour of the proposed palette was compared to that of a commercial inkjet palette, and an improvement in all functionalities was observed.

The functionalities of pigments allow the building envelope and indoor walls to exhibit temperature-moderating effects (with the additional effects of moderating global warming and increasing air conditioning efficiency), purification and disinfection of both indoor and outdoor air, and radiation attenuation.

The proposed palette and its polyfunctional characterization are novel.