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Article
Publication date: 2 May 2017

Siti Kudnie Sahari, Muhammad Kashif, Norsuzailina Mohamed Sutan, Zaidi Embong, Nik Amni Fathi Nik Zaini Fathi, Azrul Azlan Hamzah, Rohana Sapawi, Burhanuddin Yeop Majlis and Ibrahim Ahmad

The quality of GeOx–Ge interface and the equivalent oxide thickness (EOT) are the main issues in fabricating high-k/Ge gate stack due to the low-k of GeOx interfacial…

Abstract

Purpose

The quality of GeOx–Ge interface and the equivalent oxide thickness (EOT) are the main issues in fabricating high-k/Ge gate stack due to the low-k of GeOx interfacial layer (IL). Therefore, a precise study of the formation of GeOx IL and its contribution to EOT is of utmost importance. In this study, the GeOx ILs were formed through post-oxidation annealing of sputtered Al2O3 on the Ge substrate. The purpose of this paper is to report on growth kinetics and composition of IL between Al2O3 and Ge for HCl- and HF-last Ge surface.

Design/methodology/approach

After wet chemical cleaning with HCl or HF, Al2O3 was grown onto the Ge surface by RF sputtering. Thickness and composition of IL formed after post-anneal deposition at 400°C in dry oxygen ambience were evaluated as a function of deposition time by FESEM and characterized by X-ray photoelectron spectroscopy, respectively.

Findings

It was observed that the composition and thickness of IL were dependent on the starting surface and an aluminum germinate-like composition was formed during RF sputtering for both HF- and HCl-last starting surface.

Originality/value

The novelty of this work is to investigate the starting surface of Ge to IL growth between Al2O3/Ge that will lead to the improvement in Ge metal insulator field effect transistors (MISFETs) application.

Details

Microelectronics International, vol. 34 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

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Article
Publication date: 4 November 2014

Mica Grujicic, Ramin Yavari, Jennifer Snipes, S. Ramaswami and Roshdy Barsoum

The purpose of this paper is to study the mechanical response of polyurea, soda-lime glass (glass, for short), polyurea/glass/polyurea and glass/polyurea/glass sandwich…

Abstract

Purpose

The purpose of this paper is to study the mechanical response of polyurea, soda-lime glass (glass, for short), polyurea/glass/polyurea and glass/polyurea/glass sandwich structures under dynamic-loading conditions involving propagation of planar longitudinal shockwaves.

Design/methodology/approach

The problem of shockwave generation, propagation and interaction with material boundaries is investigated using non-equilibrium molecular dynamics. The results obtained are used to construct basic shock Hugoniot relationships associated with the propagation of shockwaves through a homogeneous material (polyurea or glass, in the present case). The fidelity of these relations is established by comparing them with their experimental counterparts, and the observed differences are rationalized in terms of the microstructural changes experienced by the shockwave-swept material. The relationships are subsequently used to predict the outcome of the interactions of shockwaves with polyurea/glass or glass/polyurea material boundaries. Molecular-level simulations are next used to directly analyze the same shockwave/material-boundary interactions.

Findings

The molecular-level simulations suggested, and the subsequent detailed microstructural analyses confirmed, the formation of topologically altered interfacial regions, i.e. polyurea/glass and glass/polyurea interphases.

Originality/value

To the authors’ knowledge, the present work is a first attempt to analyze, using molecular-level simulation methods, the interaction of shockwaves with material boundaries.

Details

Multidiscipline Modeling in Materials and Structures, vol. 10 no. 4
Type: Research Article
ISSN: 1573-6105

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Article
Publication date: 11 November 2014

M. Grujicic, R. Yavari, J.S. Snipes, S. Ramaswami and R.S. Barsoum

The purpose of this paper is to address the problems of interaction of tensile stress-waves with polyurea/fused-silica and fused-silica/polyurea interfaces, and the…

Abstract

Purpose

The purpose of this paper is to address the problems of interaction of tensile stress-waves with polyurea/fused-silica and fused-silica/polyurea interfaces, and the potential for the accompanying interfacial decohesion.

Design/methodology/approach

The problems are investigated using all-atom non-equilibrium molecular-dynamics methods and tools. Before these methods/tools are employed, previously determined material constitutive relations for polyurea and fused-silica are used, within an acoustic-impedance-matching procedure, to predict the outcome of the interactions of stress-waves with the material-interfaces in question. These predictions pertain solely to the stress-wave/interface interaction aspects resulting in the formation of transmitted and reflected stress- or release-waves, but do not contain any information regarding potential interfacial decohesion. Direct molecular-level simulations confirmed some of these predictions, but also provided direct evidence of the nature and the extent of interfacial decohesion. To properly model the initial state of interfacial cohesion and its degradation during stress-wave-loading, reactive forcefield potentials are utilized.

Findings

Direct molecular-level simulations of the polyurea/fused-silica interfacial regions prior to loading revealed local changes in the bonding structure, suggesting the formation of an interphase. This interphase was subsequently found to greatly affect the polyurea/fused-silica decohesion strength.

Originality/value

To the authors’ knowledge, the present work is the first public-domain report of the use of the non-equilibrium molecular dynamics and reactive force-field potentials to study the problem of interfacial decohesion caused by the interaction of tensile waves with material interfaces.

Details

International Journal of Structural Integrity, vol. 5 no. 4
Type: Research Article
ISSN: 1757-9864

Keywords

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Article
Publication date: 1 January 1989

Peter McGeehin

Optical sensor companies in the UK are getting together to organise their own research and development.

Abstract

Optical sensor companies in the UK are getting together to organise their own research and development.

Details

Sensor Review, vol. 9 no. 1
Type: Research Article
ISSN: 0260-2288

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Article
Publication date: 5 March 2020

Piotr Firek, Jakub Szarafiński, Grzegorz Głuszko and Jan Szmidt

The purpose of this study is to directly measure and determine the Si/SiO2/AlOxNy interface state density on metal insulator semiconductor field effect transistor (MISFET…

Abstract

Purpose

The purpose of this study is to directly measure and determine the Si/SiO2/AlOxNy interface state density on metal insulator semiconductor field effect transistor (MISFET) structures. The primary advantage of using aluminum oxynitride (AlOxNy) is the perfectly controlled variability of the properties of these layers depending on their stoichiometry, which can be easily controlled by the parameters of the magnetron sputtering process. Therefore, a continuous spectrum of properties can be achieved from the specific values for oxide to the specific ones for nitride, thus opening a wide range of applications in high power, high temperature and high frequency electronics, optics and sensors and even acoustic devices.

Design/methodology/approach

The basic subject of this study is n-channel transistors manufactured using silicon with 50-nm-thick AlOxNy films deposited on a silicon dioxide buffer layer via magnetron sputtering in which the gate dielectric was etched with wet solutions and/or dry plasma mixtures. Furthermore, the output, transfer and charge pumping (CP) characteristics were measured and compared for all modifications of the etching process.

Findings

An electrical measurement of MISFETs with AlOxNy gate dielectrics was conducted to plot the current-voltage and CP characteristics and examine the influence of the etching method on MISFET parameters.

Originality/value

In this report, a flat band and threshold voltage and the density of interface traps were determined to evaluate and improve an AlOxNy-based MISFET performance toward highly sensitive field effect transistors for hydrogen detection by applying a Pd-based nanocrystalline layer. The sensitivity of the detectors was highly correlated with the quality of the etching process of the gate dielectrics.

Details

Microelectronics International, vol. 37 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

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Article
Publication date: 1 May 1956

THE month of exhibitions is upon us, and work study technicians will be interested in both the Mechanical Handling Exhibition at Earl's Court (May 9–19) and the Production…

Abstract

THE month of exhibitions is upon us, and work study technicians will be interested in both the Mechanical Handling Exhibition at Earl's Court (May 9–19) and the Production Exhibition at Olympia (May 23–31). A preview of both these exhibitions is published on pages 28–56.

Details

Work Study, vol. 5 no. 5
Type: Research Article
ISSN: 0043-8022

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Article
Publication date: 25 February 2021

Sudipta Ghosh, P. Venkateswaran and Subir Kumar Sarkar

High packaging density in the present VLSI era builds an acute power crisis, which limits the use of MOSFET device as a constituent block in CMOS technology. This leads…

Abstract

Purpose

High packaging density in the present VLSI era builds an acute power crisis, which limits the use of MOSFET device as a constituent block in CMOS technology. This leads researchers in looking for alternative devices, which can replace the MOSFET in CMOS VLSI logic design. In a quest for alternative devices, tunnel field effect transistor emerged as a potential alternative in recent times. The purpose of this study is to enhance the performances of the proposed device structure and make it compatible with circuit implementation. Finally, the performances of that circuit are compared with CMOS circuit and a comparative study is made to find the superiority of the proposed circuit with respect to conventional CMOS circuit.

Design/methodology/approach

Silicon–germanium heterostructure is currently one of the most promising architectures for semiconductor devices such as tunnel field effect transistor. Analytical modeling is computed and programmed with MATLAB software. Two-dimensional device simulation is performed by using Silvaco TCAD (ATLAS). The modeled results are validated through the ATLAS simulation data. Therefore, an inverter circuit is implemented with the proposed device. The circuit is simulated with the Tanner EDA tool to evaluate its performances.

Findings

The proposed optimized device geometry delivers exceptionally low OFF current (order of 10^−18 A/um), fairly high ON current (5x10^−5 A/um) and a steep subthreshold slope (20 mV/decade) followed by excellent ON–OFF current ratio (order of 10^13) compared to the similar kind of heterostructures. With a very low threshold voltage, even lesser than 0.1 V, the proposed device emerged as a good replacement of MOSFET in CMOS-like digital circuits. Hence, the device is implemented to construct a resistive inverter to study the circuit performances. The resistive inverter circuit is compared with a resistive CMOS inverter circuit. Both the circuit performances are analyzed and compared in terms of power dissipation, propagation delay and power-delay product. The outcomes of the experiments prove that the performance matrices of heterojunction Tunnel FET (HTFET)-based inverter are way ahead of that of CMOS-based inverter.

Originality/value

Germanium–silicon HTFET with stack gate oxide is analytically modeled and optimized in terms of performance matrices. The device performances are appreciable in comparison with the device structures published in contemporary literature. CMOS-like resistive inverter circuit, implemented with this proposed device, performs well and outruns the circuit performances of the conventional CMOS circuit at 45-nm technological node.

Details

Circuit World, vol. ahead-of-print no. ahead-of-print
Type: Research Article
ISSN: 0305-6120

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Article
Publication date: 3 January 2017

Abderrazzak El Boukili

The purpose of this paper is to develop and apply accurate and original models to understand and analyze the effects of the fabrication temperatures on thermal-induced…

Abstract

Purpose

The purpose of this paper is to develop and apply accurate and original models to understand and analyze the effects of the fabrication temperatures on thermal-induced stress and speed performance of nano positively doped metal oxide semiconductor (pMOS) transistors.

Design/methodology/approach

The speed performances of nano pMOS transistors depend strongly on the mobility of holes, which itself depends on the thermal-induced extrinsic stress σ. The author uses a finite volume method to solve the proposed system of partial differential equations needed to calculate the thermal-induced stress σ accurately.

Findings

The thermal extrinsic stress σ depends strongly on the thermal intrinsic stress σ0, thermal intrinsic strain ε0, elastic constants C11 and C12 and the fabrication temperatures. In literature, the effects of fabrication temperatures on C11 and C12 needed to calculate thermal-induced stress σ0 have been ignored. The new finding is that if the effects of fabrication temperatures on C11 and C12 are ignored, then, the values of stress σ0 and σ will be overestimated and, then, not accurate. Another important finding is that the speed performance of nano pMOS transistors will increase if the fabrication temperature of silicon-germanium films used as stressors is increased.

Practical implications

To predict correctly the thermal-induced stress and speed performance of nano pMOS transistors, the effects of fabrication temperatures on the elastic constants required to calculate the thermal-induced intrinsic stress σ0 should be taken into account.

Originality/value

There are three levels of originalities. The author considers the effects of the fabrication temperatures on extrinsic stress σ, intrinsic stress σ0 and elastic constants C11 and C12.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 36 no. 1
Type: Research Article
ISSN: 0332-1649

Keywords

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Article
Publication date: 1 August 1968

Cyril Hogarth

Modern semiconductor physics has developed from the quantum mechanical work on energy band theory of charge carriers in semiconductors associated with the name of A. H…

Abstract

Modern semiconductor physics has developed from the quantum mechanical work on energy band theory of charge carriers in semiconductors associated with the name of A. H. Wilson and his classic papers on the subject, and also with the name of Schottky who pioneered the atomistic approach to disorder phenomena in solids. This work dates from about 1930 and theoretical developments up to the beginning of the War were relatively slow. Semiconductor technology in the same period was represented by a few devices only. These included the copper oxide and selenium rectifiers which were in use in certain equipment and in the process of further development. The silicon whisker detector was being used for the detection and measurement of microwave power. It will be recalled that silicon carbide and galena had been used as detectors of radio waves before the common usage of the thermionic valve. The development of radar during the War, which required semiconductor devices for detecting and mixing microwaves meant that considerable work was carried out on silicon, and parallel work on germanium meant that by the end of the War high‐back voltage rectifiers, using germanium, were available in developmental quantities. Problems of thermal detection meant that photo‐conductive and photo‐voltaic cells were developed for this purpose based on the materials thallium sulphide and lead sulphide. Attention was also focussed on electronic processes in ionic crystals in terms of improving display screens for cathode ray and similar tubes.

Details

Education + Training, vol. 10 no. 8
Type: Research Article
ISSN: 0040-0912

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Article
Publication date: 1 March 1988

J. Bardeen

This article was part of a commemorative section in Solid State Technology entitled ‘The Transistor—The First Forty Years’, which celebrated the 40th anniversary of the…

Abstract

This article was part of a commemorative section in Solid State Technology entitled ‘The Transistor—The First Forty Years’, which celebrated the 40th anniversary of the December 1987 invention of the transistor at Bell Telephone Laboratories.

Details

Microelectronics International, vol. 5 no. 3
Type: Research Article
ISSN: 1356-5362

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