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Article
Publication date: 1 January 2014

Vahid Dargahi

This study aims to propose a mathematical model for stacked multicell converters (SMCs), to be exploited in the analytic determination of natural voltage balancing dynamics of the…

Abstract

Purpose

This study aims to propose a mathematical model for stacked multicell converters (SMCs), to be exploited in the analytic determination of natural voltage balancing dynamics of the flying-capacitor (FC) stacked multicell multilevel converters, i.e. investigations of the start-up behavior, dynamic response, and natural voltage balancing phenomenon.

Design/methodology/approach

The crux of the proposed strategy is based on the closed-form analytic solution derivation for the switching functions used in the switching of the SMCs operated under phase disposition (PD) and phase shifted carrier (PSC) pulse width modulation (PD-PSC-PWM) technique. Hence, the suggested approach develops an analytic solution for the Fourier series and associated Fourier coefficients pertinent to the switching functions of the SMCs by obtaining the switching instants of the PD-PSC-PWM modulator in terms of Kapteyn series when the frequency of the triangular carrier waveform (fc) and that of the sinusoidal reference waveform (fr) have an integer ratio, i.e. f c  · f r −1=k, k∈N.

Findings

This approach results into a model, first order differential equation based model, which can be readily developed for the SMCs with any number of levels expediting the investigation of their performance. Furthermore, by an experimental scrutiny conducted on a 4×2-cell-nine-level topology of an SMC, it is inferred that under PD-PSC-PWM modulation technique, FC voltages balance naturally for higher number of stacks and cells, therefore the natural balancing exist for high-level SMCs.

Research limitations/implications

Despite the sophistication of the proposed methodology and mathematical model, this study presents an alternative approach with high potential of applicability for derivation of the multilevel converter mathematical model exploiting the Kapteyn (Bessel-Fourier) series.

Practical implications

Numeric computation results of the proposed analytic model for the SMCs and the simulation results as well as investigational measurements taken from 2×2-cell-five-level and 4×2-cell-nine-level experimental set-ups are presented in order to substantiate the suggested approach, derived model, and verification of natural balancing.

Originality/value

This article and its innovations are original.

Details

COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering, vol. 33 no. 1/2
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 2 March 2012

Thomas Vyncke, Steven Thielemans, Michiel Jacxsens and Jan Melkebeek

Flyingcapacitor multilevel converters (FCC) need a passive or active regulation of the capacitor voltages. Recently the trend is towards active control, often implemented…

Abstract

Purpose

Flyingcapacitor multilevel converters (FCC) need a passive or active regulation of the capacitor voltages. Recently the trend is towards active control, often implemented separately from the current control. The advantages of a true multi‐variable control sparked the interest to apply Model Based Predictive Control (MBPC) for FCC. In this paper an objective analysis method to evaluate the effects of several design choices is presented. The effects of the weight factor selection, model simplification, and prediction horizon expansion for MBPC of a 3‐level FCC are analyzed in a systematical way.

Design/methodology/approach

The analysis is mainly based on the mean square error (MSE) of current and capacitor voltage. The results are analysed for different lengths of the prediction horizon and for a wide range of weight factor values. Similarly the effect of a model simplification, neglecting the neutral point voltage, is studied when implementing MBPC for FCCs while considering the computational aspects. Validation of the simulation results is done by experiments on an FPGA‐based setup.

Findings

Including the effect of the neutral point voltage considerably increases the current control quality and a much wider range of good values for the weight factor exists. As this good range is not critically dependent on the current amplitude it is possible to select one weight factor value for all operating points. Furthermore, it is concluded that increasing the prediction horizon increases the computational load without improving the control quality.

Research limitations/implications

The effects of increasing the prediction horizon when including other controlled variables is to be investigated, as well as the robustness to modeling errors. The MSE analysis methodology is very suitable for this further research.

Practical implications

For practitioners of MBPC in power electronics the paper proves that by means of simulations and the MSE one value for weight factor can be chosen for all operating points. The paper clearly shows that a practical implementation is feasible and demonstrates that neglecting the neutral point voltage is not good practice.

Originality/value

The MSE‐based analysis is shown to be a systematical and unbiased methodology to evaluate the effects of design choices. The results from this analysis can be directly applied in practical setups.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 31 no. 2
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 8 May 2018

Shirali Kadyrov, Piotr Sebastian Skrzypacz and Yakov Lvovich Familiant

The paper aims to emphasise how switched systems can be analysed with elementary techniques which require only undergraduate-level linear algebra and differential equations. It is…

78

Abstract

Purpose

The paper aims to emphasise how switched systems can be analysed with elementary techniques which require only undergraduate-level linear algebra and differential equations. It is also emphasised how math software can become useful for simplifying analytic complications.

Design/methodology/approach

The time domain voltage balance methodology is used for stability analysis. As for deriving formulas for the asymptotic average of both capacitor voltage and inductor current, a new simple analytic method is introduced.

Findings

It was shown analytically that the time average of capacitor voltage converges to half of the source voltage. A formula for the time average of the current of the inductor is also computed. As a by-product, it was discovered that the period of the current is half of the switching period. Numerical simulations are obtained to illustrate the accuracy of the results.

Research limitations/implications

Higher dimensional generalisations could become a bit complicated, as stability analysis of higher dimensional exponential matrices is not so easy to handle. On the other hand, the new discovery on the period of the current is more likely to give new insights into handling higher dimensional systems.

Practical implications

Analytical formulas are exact, and it helps in accurately modelling flying capacitor converts (FCCs) in practice.

Originality/value

FCC is well studied in engineering society. However, not much is done in obtaining closed form solutions using analysis. Also, math software is much used in computation of numerical results and obtaining simulations. In this paper, one more important aspect of math software is emphasised, namely, use symbolic and numeric computing environment Maple in analysis.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 37 no. 3
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 9 November 2012

J.W. van der Merwe, H. du T. Mouton and S. Thielemans

The flying capacitor converter (FFC) balances the clamping capacitor voltages naturally when phase shifted carrier modulation is used. Several models that describe this mechanism…

Abstract

Purpose

The flying capacitor converter (FFC) balances the clamping capacitor voltages naturally when phase shifted carrier modulation is used. Several models that describe this mechanism, and to estimate the time constants following a perturbation, are discussed in the literature. However, due to the model complexity, numerical methods must be used to evaluate these models. This paper aims to present a closed form expression, using a reference table, that describes a maximum bound for the voltage balancing time constant.

Design/methodology/approach

The FCC is analysed in the frequency domain. A decomposition of the characteristic matrix that describes the voltage balancing mechanism is used. The resulting real symmetric matrix is factorised by using approximations of the load characteristics at the frequencies of interest.

Findings

The minimum eigenvalue of the factorised matrix is used to determine a maximum bound for the time constant of the voltage balancing. Since the factorised matrix is independent of variations in switching frequency and load, the eigenvalue of interest can be calculated once and tabulated.

Originality/value

The closed form expression can be used for quick calculations of the maximum time constant under different operating conditions. Furthermore, the expression provides considerable insight into the influences circuit design choices have on the balancing mechanism.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 31 no. 6
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 9 November 2012

J.W. van der Merwe and H. du T. Mouton

The flying capacitor converter (FFC) balances the clamping capacitor voltages naturally when phase shifted carrier modulation is used. Several models that describe this mechanism…

Abstract

Purpose

The flying capacitor converter (FFC) balances the clamping capacitor voltages naturally when phase shifted carrier modulation is used. Several models that describe this mechanism are discussed in the literature. However, due to the model complexity, the stability of the mechanism is inferred from the circuit operation. This paper aims to show that the expressions describing the balancing mechanism can be simplified and used to prove Lyapunov stability.

Design/methodology/approach

The FCC is analysed in the frequency domain. An equivalent circuit that describes the converter operation in terms of total and difference parameters is used. A concerted effort is made to simplify the resulting convolution expressions to their most basic forms by using the characteristics of the phase shifted switching functions' Fourier series coefficients.

Findings

It is shown that the system matrix decomposes naturally into the sum of a symmetric and a skew‐symmetric matrix. Through use of Lyapunov's theorem it is shown that the system is stable if the symmetric part of the decomposition is positive definite. A proof is provided that this matrix is positive semidefinite and the system is therefore Lyapunov stable.

Research limitations/implications

The simplified expressions describing the convolution and the decomposition of the system matrix can be used in future studies to provide maximum bounds on the rebalancing time constant.

Originality/value

This study provides a proof that the natural voltage balancing mechanism is stable. This stability had to be inferred from circuit operation in previous studies. Secondly, the decomposition of the system matrix provides an avenue for future research.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 31 no. 6
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 8 May 2018

Henda Jabberi and Faouzi Ben Ammar

To improve the voltage quality in AC adjustable high-power-speed-drive applications, the purpose of the paper is to provide a large number of output levels without increasing the…

Abstract

Purpose

To improve the voltage quality in AC adjustable high-power-speed-drive applications, the purpose of the paper is to provide a large number of output levels without increasing the number of commutation cells in the three-phase, n-cells flying capacitor voltage source asymmetric Multilevel Inverter (MI). The concept is based on the selection of different ratios between the breakdown voltages of two successive power devices. The new mathematical model is developed under various ratios, allows a thorough investigation of the harmonic distortions, flying capacitor energy storage, flying capacitor voltage balancing controllability and blocking voltage insulated gate bipolar transistor (IGBT) capability.

Design/methodology/approach

The asymmetrical design provides a large number of output levels without increasing the number of commutation cells. The important new analytical expression of capacitors voltage distribution is derived and extended to any ratio between the switch breakdown voltages of two successive power devices.

Findings

The detailed simulation study of the proposed concept has been carried out using MATLAB/Simulink. The power switches control of the three-phase three-cell MI is assured by new phase-shifted-multi-carrier pulse width modulation. The space vector representation is used to show the regular and irregular step output voltage in the complex plan (α,β).

Originality/value

In the paper, the n cells flying capacitor inverter, which typically operates in the (n + 1) levels mode, was extended to (n + 2), (n + 3) … until 2n levels with regular or irregular step output voltage. Consequently, the claimed advantages of the asymmetric MI are to improve power quality by reducing harmonic distortions and to reduce the requirement on capacitive energy storage in the circuit.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 37 no. 3
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 9 August 2021

Md Tariquzzaman, Md Habibullah and Amit Kumer Podder

Maintaining a balanced neutral point, reducing power loss, execution time are important criteria for the controlling of neutral point clamped (NPC) inverter. However, it is tough…

Abstract

Purpose

Maintaining a balanced neutral point, reducing power loss, execution time are important criteria for the controlling of neutral point clamped (NPC) inverter. However, it is tough to meet all the challenges and also supplying the load current within the harmonic limit. This paper aims to maintain load current quality within the Institute of Electrical and Electronics Engineers 519 standard and meet the above-mentioned challenges.

Design/methodology/approach

The output load current of a three-level simplified neutral point clamped (3 L-SNPC) inverter is controlled in this paper using model predictive control (MPC). The 3 L-SNPC inverters is considered because fewer semiconductor devices are used in this topology; this will enhance the reliability of the system. MPC is used as a controller because it can handle the direct current-link capacitors’ voltage balancing problem in a very intuitive way. The proposed 3 L-SNPC yields similar current total harmonic distortion (THD), transient and steady-state responses, voltage stress and over current protection capability as the conventional NPC inverter. To reduce the computational burden of the proposed SNPC system, two simplified MPC strategies are proposed, namely, single voltage vector prediction-based MPC and selective voltage vector prediction-based MPC.

Findings

The system shows a current THD of 2.33% at 8.96 kHz. The overall loss of the system is reduced significantly to be useful in medium power applications. The required execution times for the simplified MPC strategies are tested on the hardware dSPACE 1104 platform. It is found that the single voltage vector prediction-based MPC and the selective voltage vector prediction-based MPC are computationally efficient by 8.28% and 62.9%, respectively, in comparison with the conventional MPC-based conventional NPC system.

Originality/value

Multiple system constraints are considered throughout the paper and also compare the SNPC to the conventional NPC inverter. Proper current tracking, over-current protection, overall power loss reduction especially switching loss and maintaining capacitor voltages balance at a neutral point are achieved. The improvement of execution time has also been verified and calculated using hardware-in-loop of the dSPACE DS1104 platform.

Details

World Journal of Engineering, vol. 20 no. 1
Type: Research Article
ISSN: 1708-5284

Keywords

Article
Publication date: 2 April 2019

Kanungo Barada Mohanty, Kishor Thakre, Aditi Chatterjee, Ashwini Kumar Nayak and Vinaya Sagar Kommukuri

This study aims to propose a modified topology for an asymmetric multilevel inverter as a basic module that generates 13-level output voltage waveform. The basic module consists…

Abstract

Purpose

This study aims to propose a modified topology for an asymmetric multilevel inverter as a basic module that generates 13-level output voltage waveform. The basic module consists of eight switches (unidirectional and bidirectional switch) and four DC voltage sources with unequal magnitudes. The proposed topology reduces the number of switches, isolated DC sources, cost and size of the circuit significantly as compared to other topologies. In addition, the proposed circuit provides a modular structure for a multilevel inverter.

Design/methodology/approach

The proposed configuration is implemented through simulation and hardware development of a single-phase 13-level inverter prototype. A multicarrier-based pulse width modulation scheme is adopted for generating switching signals by using dSPACE real-time controller.

Findings

To demonstrate the advantages of the proposed configuration, a comparative analysis is carried out with other multilevel topologies in terms of number of switches, gate driver circuits, on-state switches and blocking voltage on the switches. The comparison results confirmed that the proposed configuration requires less number of components for the same number of voltage levels. Moreover, the peak inverse voltage on switches and losses is lower in the proposed configuration.

Originality/value

In the available literature, numerous topologies are presented with main emphasis on the reduced components count. In this study, the authors proposed a new topology for an asymmetrical source configuration. The performance of the proposed topology under steady-state and dynamic conditions is evaluated using simulation and experimental implementation.

Details

World Journal of Engineering, vol. 16 no. 1
Type: Research Article
ISSN: 1708-5284

Keywords

Article
Publication date: 9 November 2012

Alfonso Parreño Torres, Pedro Roncero‐Sánchez, Xavier del Toro García and Vicente Feliu Batlle

The protection of sensitive loads connected to power distribution grids from the existing disturbances has become an important issue in recent years. This paper aims to evaluate…

281

Abstract

Purpose

The protection of sensitive loads connected to power distribution grids from the existing disturbances has become an important issue in recent years. This paper aims to evaluate the advantages of a new control strategy, known as the generalized proportional‐integral (GPI) control, to compensate voltage sags when using dynamic voltage restorers (DVR).

Design/methodology/approach

The DVR application and the principles of the GPI control method are first introduced. In addition, a procedure to adjust the controller for the DVR application is described. Finally, the performance of the controller is extensively tested using the PSCAD/EMTDC simulation software for a variety of conditions including: balanced and imbalanced voltage sags, frequency deviations and parameter variations.

Findings

The GPI controller provides an excellent tradeoff between accuracy, response time and robustness.

Originality/value

The GPI controller is presented here as a new approach to compensate balanced and imbalanced voltage sags using a DVR. The results obtained with the proposed control system and the described methodology to adjust the control parameters make it a very suitable solution for this application. It is important to note that fast tracking and high accuracy are achieved as illustrated in the control responses. Furthermore, the analysis of the robustness against parameter variations and frequency deviations demonstrates one of the most remarkable advantages of the new control method.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 31 no. 6
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 1 January 2013

Javier Pereda and Juan Dixon

The aim of this paper is to improve and adapt cascaded multilevel converters for electric vehicles (EVs) to have all the advantages of these converters and to eliminate its…

Abstract

Purpose

The aim of this paper is to improve and adapt cascaded multilevel converters for electric vehicles (EVs) to have all the advantages of these converters and to eliminate its limitation in the use of EVs applications. Specifically, the purpose is to use only a single power source (battery pack, fuel cell, etc.) and to generate a higher power‐quality than regular multilevel converters.

Design/methodology/approach

This paper is based in a cascaded multilevel converter conformed by two 3‐level inverters connected in series. The voltage sources of the auxiliary inverter were replaced by floating capacitors which work as active filters, reducing the power sources to one. The floating capacitor voltages were controlled by a PI controller that adjusts the modulation index (m) to obtain a zero average power in the auxiliary inverters, and a predictive control selects the optimal redundant state to reduce the error and balance all the capacitor voltages. As the modulation index is determined by the PI controller, the output voltage magnitude must be controlled by a variable voltage source (e.g. buck‐boost chopper). Additionally, the converter works with new optimal voltage asymmetries to obtain higher power quality and capacitor control stability.

Findings

The proposed converter uses a topology that conventionally generates 9‐levels of voltage, but with the proposed asymmetry is as generate 11‐levels. Also, the auxiliary power sources were eliminated.

Research limitations/implications

The proposed solution has a limited dynamic response due to the variation rate of the capacitor voltage, which is limited by the load current and the capacitance. However, the dynamic response and control stability is satisfactory for EVs applications.

Originality/value

The paper presents a new control to manage the floating capacitor voltages and uses new voltage asymmetries in cascaded multilevel converters.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 32 no. 1
Type: Research Article
ISSN: 0332-1649

Keywords

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