Search results

1 – 4 of 4
Article
Publication date: 15 July 2022

Khairul Mohd Arshad, Muhamad Mat Noor, Asrulnizam Abd Manaf, Kawarada H., Falina S. and Syamsul M.

Vertical-cavity surface-emitting laser (VCSEL) is a high-performance semiconductor device made of unique epitaxial layers grown on n-type GaAs or InP substrates. The VCSEL…

Abstract

Purpose

Vertical-cavity surface-emitting laser (VCSEL) is a high-performance semiconductor device made of unique epitaxial layers grown on n-type GaAs or InP substrates. The VCSEL’s thermal resistance, Rth, is an essential metric that reflects its thermal properties and dependability. The purpose of this paper is to develop packaging for 1 mm2 VCSEL chips made of a variety of materials, such as ceramic, lead frame and printed circuit board (PCB)-based packaging, as well as provide an idea or design that can withstand and perform well in terms of Rth and heat dissipation during operation. SolidWorks 2017 and AutoCAD Mechanical 2017 software were used to publish all thoughts and ideas, including the size dimensions (x, y and z) and material choices for each package.

Design/methodology/approach

Following the modelling and material selection, the next step is to use the Ansys Mechanical Structural FEA Analysis software to simulate all packaging for Rth and determine which packaging produced the best result, therefore, determining the heat dissipation for each packing. All parameters were used based on the standard cleanroom requirement for the industrial manufacturing backend process, where the cleanroom classification is 10,000 particles (ISO 7). The results demonstrated that the ceramic and lead frame provided good Rth values of 7.3 and 7.0 K/W, respectively, when compared to the PCB, which provided more than 80 K/W; thus, the heat dissipation for PCB packaging also increased.

Findings

As a result of the research, it was determined that ceramic and lead frame packaging are appropriate and capable of delivering good Rth and heat dissipation values when compared to PCB. In comparison to PCB, which requires numerous modifications, such as adding via holes and a thermal bar in an attempt to lower the Rth value, neither packaging requires improvement. Ceramic was chosen for development based on Rth's highest performance, with the actual device consisting of a lead frame and PCB. The Zth measurement test was carried out on a ceramic package, and the Rth result was comparable to the simulation result of 7.6 K/W, indicating that simulation was already proved for research and development.

Originality/value

The purpose of this study is to determine which proposed packaging design would give the highest Rth performance of a 1 mm2 chip as well as the best heat dissipation. In comparison to other studies, VCSEL packaging used the header and window cap as package components with a wavelength of 850 nm, and other VCSEL packaging developments used the sub mount on ceramic package with an output power ranging from 500 mW to 2 W, whereas this study used a huge wavelength and an output power of 4 W.

Details

Microelectronics International, vol. 40 no. 1
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 11 October 2019

Viktor I. Dobrosotskiy, Galina N. Semenova, Elena B. Kazarinova and Natalya V. Falina

The purpose of the paper is to develop a perspective mechanism of the investment and innovative activities of university in the conditions of industry 4.0, which allows…

Abstract

Purpose

The purpose of the paper is to develop a perspective mechanism of the investment and innovative activities of university in the conditions of industry 4.0, which allows supporting its high investment attractiveness and high effectiveness of usage of venture investments in digital education.

Design/methodology/approach

The research is performed by the example of modern Russia with application of the methods of trend analysis and regression analysis in two consecutive stages. The authors determine regression dependence of the efficiency of digital modernization of universities (on the basis of the indicator of fixed assets implementation) on the volume of investments into fixed assets. Dependence of the indicator of digital competitiveness of education (“training and education”), calculated within the part “knowledge” of the IMD rating “world digital competitiveness ranking,” on commissioning of fixed assets by universities is determined. For the purpose of representativeness of the selection of statistical data, which initial period is 2012, not only factual data for 2012-2018 are used but also forecast data for 2019-2024 (as the national program “digital economy of the Russian Federation” is due until 2024).

Findings

Low effectiveness of usage of venture investments in digital education in Russia is substantiated. As investments are provided in the form of target state financing, universities cannot independently determine the directions of their usage and have to use them for purchasing digital equipment and technologies. Other necessary measures for digital modernization of education, namely, training of digital personnel for university, access to digital infrastructure, development of new educational programs, conduct of research and development and marketing, are not implemented.

Originality/value

It is determined that attraction of private venture investments faces the problem of their large volume and high risk. Both problems could be solved by the developed mechanism of investment and innovative activities of a university in the conditions of industry 4.0. It shifts the initiative from university to digital business, which independently initiates the process of venture investing.

Article
Publication date: 14 November 2016

Evgeny L. Pankratov and Elena A. Bulaeva

The purpose of this paper is to analyze and optimize the formation of field-effect heterotransistors using analytical approach. The approach makes it possible to analyze…

Abstract

Purpose

The purpose of this paper is to analyze and optimize the formation of field-effect heterotransistors using analytical approach. The approach makes it possible to analyze mass and heat transport in a multilayer structure without cross-linking of solutions on interfaces between layers of the multilayer structure. The optimization makes it possible to decrease dimensions of the heterotransistors and to increase speed of transport of charge carriers during functioning of the transistors.

Design/methodology/approach

The authors introduce an analytical approach for analysis of mass and heat transport, which makes it possible to take into account at one time varying in space and time parameters of the transports (diffusion coefficient, heat conduction coefficient, etc.) and nonlinearity of processes. The approach enables analysis of mass and heat transport in a multilayer structure without cross-linking of solutions on interfaces between layers of the multilayer structure and optimises the technological process. The optimization means it is possible to decrease dimensions of field-effect heterotransistors.

Findings

In this paper the authors introduce an approach to manufacture a field-effect heterotransistor with inhomogeneous doping of channel. Some recommendations to optimize technological process to manufacture more compact distribution of concentration of dopant have been formulated.

Originality/value

The results are original and the paper provides an approach to the manufacture of a field-effect heterotransistor.

Details

Multidiscipline Modeling in Materials and Structures, vol. 12 no. 4
Type: Research Article
ISSN: 1573-6105

Keywords

Article
Publication date: 14 August 2017

Evgeny L. Pankratov and Elena Alexeevna Bulaeva

The purpose of this paper is to analyze the redistribution of dopant and radiation defects to determine conditions which correspond to decreasing of elements in the…

Abstract

Purpose

The purpose of this paper is to analyze the redistribution of dopant and radiation defects to determine conditions which correspond to decreasing of elements in the considered inverter and at the same time to increase their density.

Design/methodology/approach

In this paper, the authors introduce an approach to increase integration rate of elements in a three-level inverter. The approach is based on decrease in the dimension of elements of the inverter (diodes and bipolar transistors) due to manufacturing of these elements by diffusion or ion implantation in a heterostructure with specific configuration and optimization of annealing of dopant and radiation defects.

Findings

The authors formulate recommendations to increase density of elements of the inverter with a decrease in their dimensions.

Practical implications

Optimization of manufacturing of integrated circuits and their elements.

Originality/value

The results of this paper are based on original analysis of transport of dopant with account transport and interaction of radiation defects.

Details

International Journal of Intelligent Computing and Cybernetics, vol. 10 no. 3
Type: Research Article
ISSN: 1756-378X

Keywords

1 – 4 of 4