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G. Azdasht, E. Zakel and H. Reichl
The advances in miniaturisation and ever increasing complexity of integrated circuitsfrequently mean an increase in the number of connections to a component with simultaneous…
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The advances in miniaturisation and ever increasing complexity of integrated circuits frequently mean an increase in the number of connections to a component with simultaneous reduction in pitch. For these emerging smaller contact geometries, micro‐laser connection technologies are required. The reliability of the connection plays a decisive rôle. The implementation and reproducibility of laser connections technology in micro‐electronics depend on good thermal contact between the two parts and high quality absorption of the material surface used. Laser energy can cause local melting due to overheating of the lead because of the low distance between lead and bump. This effect influences the reproducibility of the contacts. Even the slightest interruption in the thermal contact of the parts can cause non‐reproducibility of the contacts. Materials with a higher quality of absorption, for example Sn(32% ), can be soldered with a good level of reproducibility. This clearly differs from gold (4% ) or copper(7% ) surfaces. Due to the low absorption of these materials it is necessary to use a laser with a higher intensity to produce the same energy. Irregularities in the quality of absorption, laser instability and thermal contact can not guarantee reproducibility of the interconnections with this high laser intensity. The FPC (fibre push connection) system offers several solutions to the problems mentioned. This system enables the laser to be transported by fibre to the contact parts. The end piece of the fibre serves at the same time as a pushing unit. The advantage of this system is that the attenuation heat of the fibre end surface is also available for the connection. This improves the use of laser energy. As part of the laser energy at the end surface of the fibre is transformed into thermal energy, independently of the absorption quality of the material used, connection of a gold‐plated contact part is possible. By pressing the connecting parts with the tip of the fibre, optimal coupling is achieved. The reproducibility of different metallisations and the reliability of connections with a pitch below 100 μm are presented as well as further applications of this system.
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J. Eldring, E. Zakel and H. Reichl
Ball‐bumping is a flexible low cost bumping technology based on the conventional wire bonding procedure. It is applicable to single chips or whole wafers as well as to substrates…
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Ball‐bumping is a flexible low cost bumping technology based on the conventional wire bonding procedure. It is applicable to single chips or whole wafers as well as to substrates. As established wire‐bonding machines can be used, expensive bumping‐process equipment for phototooling and plating is not necessary. Flip‐chip bonding is the most advantageous attach method of high frequency applications. Compared with wire‐bonding and TAB it allows the highest contact density, the shortest signal paths and lowest interconnection parasitics. The reduced pad sizes and pitches, not only of GaAs devices, demand a well controlled bump deformation during flip‐chip bonding. This work develops process parameters for the flip‐chip bonding of silicon and GaAs devices with respect to the best interconnection result by lowest bonding force and ball‐bump deformation. Ball‐bumps with diameters of 50 and 80 urn (2.0 and 3.2 mils) were created using 98% AuPd bump wire with diameters of 18 µm (0.7 mil) and 25 µm (1.0 mil) respectively. Ball‐bumping with a minimal pitch of 70 µm (2.8 mils) has been achieved. A special preparation allowed the shear test investigation of each bump/pad interface after flip‐chip attach. Bonding forces of 20 and 25 cN/bump respectively lead to a good welding in the bump/substrate interface due to the special shape of ball‐bumps. For silicon devices which have a pad metallisation of aluminium, the shear forces of the bump/pad interface increase after flip‐chip bonding, too. No cratering of GaAs and silicon occurs after flip‐chip bonding due to a low bonding force ramp of 5 cN/s and 10 cN/s respectively. The flip‐chip attach of a Fujitsu FLR 016 GaAs‐FET which has pad sizes of 35 urn is demonstrated. In this case, substrate bumping is the more advantageous bumping method. The feasibility of fine‐pitch TAB attach using ball‐bumps is introduced. 100 µm (3.9 mils) pitch silicon devices with 328 pads were ball‐bumped for both solder and thermal‐compression TAB. Bond forces were in the range of 9–11 cN/bump and 15–21 cN/bump respectively. Pull forces of approximately 30 cN/lead show good results of the bump/lead interconnection after TAB.