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Article
Publication date: 1 August 2004

29

Abstract

Details

Soldering & Surface Mount Technology, vol. 16 no. 2
Type: Research Article
ISSN: 0954-0911

Keywords

Article
Publication date: 1 December 2003

Liyu Yang, Carl K. King and Joseph B. Bernstein

Liquid encapsulation techniques have been used extensively in advanced semiconductor packaging, including applications of underfilling, cavity‐filling, and glob top encapsulation

Abstract

Liquid encapsulation techniques have been used extensively in advanced semiconductor packaging, including applications of underfilling, cavity‐filling, and glob top encapsulation. Because of the advanced encapsulation materials and the automatic liquid dispensing equipment involved, it is very important to understand the encapsulation material characteristics, equipment characteristics, encapsulation process development techniques in order to achieve the encapsulation quality and reliability. In this paper, the authors will examine the various considerations in liquid encapsulation applications and address the concerns on material characterization, automatic liquid dispensing equipment/process characterization and the encapsulation quality and reliability. The discussions will be helpful for future material and process development of semiconductor packages.

Details

Microelectronics International, vol. 20 no. 3
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 1 August 2004

C.Y. Huang

Flip chip technology involves the attachment of active side of the silicon chip onto printed circuit board or substrate. The interconnections are provided by solder bumps, which…

Abstract

Flip chip technology involves the attachment of active side of the silicon chip onto printed circuit board or substrate. The interconnections are provided by solder bumps, which are arranged in the area under the chip. Encapsulation helps reduce the impact of the thermal stress that results from the mismatch in the coefficient of thermal expansion between the silicon chip and the substrate. The adhesion of the encapsulant to the chip and the board coating are essential to the reliability of the package. This paper studies the adhesion characteristics of an encapsulant to a flip chip package. The quality of the encapsulation was inspected using a scanning acoustic microscope. The electrical continuity of the assemblies was tested during the liquid‐to‐liquid thermal shock testing. The various delamination mechanisms were then studied. Delamination was found predominantly at the interface between the passivation layer and the encapsulant material. Comparisons were made between samples assembled by different materials used, such as chip passivation layer, encapsulant materials, and fluxes. Finally, the best material combination was determined.

Details

Microelectronics International, vol. 21 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 1 December 1996

P. Swanson

Light radiation cure adhesives, coatings and encapsulants are being used in the electronics manufacturingindustry with increasing frequency because their properties and process…

87

Abstract

Light radiation cure adhesives, coatings and encapsulants are being used in the electronics manufacturing industry with increasing frequency because their properties and process advantages are a good fit for the manufacturing requirements which are demanded by current industry drivers, such as miniaturisation, environmental and health & safety demands, manufacturing yield improvement and total product cost. Light curing adhesive systems in the electronics manufacturing industry have found applications in strain relief, wire and parts tacking, coil terminating, tamper‐proofing, structural bonding, temporary masking, potting, encapsulation, glob topping, conformal coating, and surface mount component attachment. This paper describes three case histories where photo cure adhesives were introduced to an electronics manufacturing environment, and discusses their rationale, implementation and their economics. The case histories encompass printed circuit board assembly (including surface mount), electronics packaging and microelectronic encapsulation. Production managers and process engineers are given confidence that practical adhesive application can be clean, fast and economical.

Details

Soldering & Surface Mount Technology, vol. 8 no. 3
Type: Research Article
ISSN: 0954-0911

Keywords

Content available
Article
Publication date: 1 August 2000

David Kingsley

76

Abstract

Details

Microelectronics International, vol. 17 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 1 January 1990

J.H. Lau, S.J. Erasmus and D.W. Rice

A review of state‐of‐the‐art technology pertinent to tape automated bonding (for fine pitch, high I/O, high performance, high yield, high volume and high reliability) is…

200

Abstract

A review of state‐of‐the‐art technology pertinent to tape automated bonding (for fine pitch, high I/O, high performance, high yield, high volume and high reliability) is presented. Emphasis is placed on a new understanding of the key elements (for example, tapes, bumps, inner lead bonding, testing and burn‐in on tape‐with‐chip, encapsulation, outer lead bonding, thermal management, reliability and rework) of this rapidly moving technology.

Details

Circuit World, vol. 16 no. 2
Type: Research Article
ISSN: 0305-6120

Article
Publication date: 31 July 2007

Farhad Sarvar, David C. Whalley, David A. Hutt, Paul J. Palmer and Nee Joo Teh

The encapsulation of electronic assemblies within thermoplastic polymers is an attractive technology for the protection of circuitry used in harsh environments, such as those…

Abstract

Purpose

The encapsulation of electronic assemblies within thermoplastic polymers is an attractive technology for the protection of circuitry used in harsh environments, such as those experienced in automotive applications. However, the relatively low‐thermal conductivity of the encapsulating polymer will introduce a thermally insulating barrier, which will impact on the dissipation of heat from the components and may result in the build‐up of stresses in the structure. This paper therefore seeks to present the results from computational models used to investigate the thermal and thermo‐mechanical issues arising during the operation of such electronic modules. In particular, a two‐shot overmoulded structure comprising an inner layer of water soluble and an outer layer of conventional engineering thermoplastics was investigated, due to this type of structure's potential to enable the easy separation of the electronics from the polymer at the end‐of‐life for recycling.

Design/methodology/approach

Representative finite element models of the overmoulded electronic structures were constructed and the effects of the polymer overmould were analysed through thermal and thermo‐mechanical simulations. Investigations were also carried out to explore the effect of materials properties on the overmoulded structure.

Findings

Models have shown that some power de‐rating of components is required to prevent temperatures exceeding those in unencapsulated circuits and have quantified the benefits of adding thermally conductive fillers to the polymer. Simulations have also clearly demonstrated the benefits of foamed polymers in reducing thermal stresses in the assemblies, despite their poorer thermal conductivity compared with solid polymers.

Originality/value

The paper illustrates the thermal issues affecting the overmoulded electronics and gives some guidelines for improving their performance.

Details

Microelectronics International, vol. 24 no. 3
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 1 August 1996

J.J. Clementi, G.0. Dearing and C. Bergeron

The IBM ceramic quad flat pack (CQFP) is a high performance, low‐costchip carrier for surface mount assembly. It is an extension of metallised ceramic (MC) andmetallised ceramic…

151

Abstract

The IBM ceramic quad flat pack (CQFP) is a high performance, low‐cost chip carrier for surface mount assembly. It is an extension of metallised ceramic (MC) and metallised ceramic with polyimide (MCP) product technologies. These finished modules conform to JEDEC I/O and footprint standards. They are available in 0.5 mm and 0.4 mm lead pitches with flexibility to address unique application requirements such as body sizes or lead pitches. Connection from integrated circuit (IC) to carrier is performed using flip‐chip (C4 ‐ Controlled Collapse Chip Connection) attach. Silicon die size and the quantity of C4 connections for flip‐chip joining have historically been constrained to reduce early life failures caused by solder fatigue wearout. This DNP (distance from neutral point of chip footprint) limitation has been overcome with increasing usage of epoxy encapsulation as a flip‐chip underfill. The encapsulant matches the coefficient of thermal expansion (CTE) of C4 solder and minimises stresses on the interconnection. This enhancement provides a substantial reliability improvement in comparison with unencapsulated packages. Also, it enables larger die with smaller C4 solder bumps on finer pitches to be assembled on ceramic carriers. Recent product development and testing have extended flip‐chip on ceramic packaging technology even further than previously anticipated. Test die up to 20 mm in size with over 2,000 C4 joints have been successfully assembled, encapsulated, stress tested and qualified in CQEP modules. Flip‐chip assembly and encapsulation of C4 connections on very large die to CQFP components have been implemented into IBM manufacturing production. This large‐scale packaging enhancement continues to demonstrate that flip‐chip underfill eliminates the intrinsic failure mechanisms associated with fatigue wearout. This provides a significant technology extension to this low‐cost and high reliability product offering.

Details

Microelectronics International, vol. 13 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 1 February 1976

W. MacLeod Ross

In this paper a review is given of the more commonly employed organic polymers for coating and embedment of electronic modules. Following discussion of the basic types and their…

Abstract

In this paper a review is given of the more commonly employed organic polymers for coating and embedment of electronic modules. Following discussion of the basic types and their properties, problems arising from emission of volatiles from encapsulants are outlined and the importance of considering these in early design stages is stressed.

Details

Circuit World, vol. 2 no. 3
Type: Research Article
ISSN: 0305-6120

Article
Publication date: 1 January 1998

Daniel R. Gamota and Cindy M. Melton

Encapsulant materials for flip‐chip‐on‐board (FCOB) were developed to address issues that have been observed during assembly of consumer electronic products on a high volume…

Abstract

Encapsulant materials for flip‐chip‐on‐board (FCOB) were developed to address issues that have been observed during assembly of consumer electronic products on a high volume manufacturing FCOB/SMT line. The viscosity, surface tension, and filler particle sizes of several encapsulants were studied in an attempt to correlate these properties to their recorded underfill times and to observe their flow properties under the gap. Materials characterization studies were performed to determine their glass transition temperatures (Tg), tensile elastic and loss moduli (E′ and E′′), coefficients of thermal expansion (CTE), and apparent strengths of adhesion (ASA). In addition, reliability tests were conducted, and several promising materials were identified. The ASA of the encapsulant to the die passivation and the printed circuit board (PCB) is critical to the robustness of the assembly. Studies were conducted to observe the ASA as a function of FCOB assembly conditioning prior to underfilling and the degradation of the ASA as a function of humidity exposure. The ASA of the FCOB encapsulants was highest when the assembly was “baked‐out” prior to underfilling. Conditioning the assemblies for 24 hours at 23°C/85 per cent RH, to simulate the “worse case” factory environment, reduced the ASA. The ASA was also reduced when the “baked‐out” assemblies were placed in the 85°C/85 per cent RH chamber after underfilling. Although the ASA was decreased when the boards were not “baked‐out”, the reliability performance was not affected during air to air temperature cycling (AATC). A new class of low stress encapsulant materials systems were developed to reduce the stress state of the backside of the die. Studies showed that for specific materials compositions, the stress was proportional to the glass transition temperature of the encapsulant. In addition, it was observed that the stress state was a function of humidity, temperature, and time. FCOB assemblies were built with several low stress encapsulants and placed in reliability testing and they performed as well as assemblies underfilled with the qualified encapsulant.

Details

Circuit World, vol. 24 no. 1
Type: Research Article
ISSN: 0305-6120

Keywords

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