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Several years ago, North Carolina State (NC State) University Libraries technical services department, Acquisitions & Discovery (A&D), merged acquisitions, cataloging, and electronic resources management functions and staff. One intended outcome for the merger included integrating and distributing electronic resources management across all staff positions whereby staff would be trained to manage a larger portion of the life cycle for print and electronic resources. The benefits of a life cycle approach for both print and electronic resources included better staff understanding of resources; staff ownership of packages; and improved staff follow-through, consistency, and ability to troubleshoot. Key positions were reimagined to support this effort. This included the creation of a staff package manager role in the serials unit to provide oversight of e-journal packages, distribute work to staff, and create and maintain an information dashboard (the Electronic Resources Hub) for staff as well as for other stakeholder departments across the libraries. The monographs unit has recently adopted a similar integrated approach to manage NC State's growing collection of e-books. This chapter will outline A&D implementation of two package management models, one for serials and one for monographs; describe the associated tools and technologies used for support; and discuss lessons learned. Benefits will be discussed to illustrate how other libraries might transform their electronic resource management operations by using a package management strategy.

In the semiconductor electronics industry, effective heat removal from the integrated circuits (IC) chip, through the electronic package to the environment is crucial to maintain an allowable junction temperature of the IC chip. Thermal performances of such electronic packages are characterized by package thermal resistance called θ‐JA and are widely used in the electronic industry. Improving thermal performance is numerically predicted using computational fluid dynamics (CFD) technique and experimental tests are carried out to verify the numerical predictions. To provide new/additional data and demonstrate CFD technique for thermal characterization of electronic packages with experimental results.

The thermal performance of electronic packages has been studied using a CFD technique. The finite volume method is a technique used for solving a set of partial differential equations in a domain, using control volume based discretization. A detailed thermal model of an electronic package was created using a CFD tool and validated against the experimental data obtained in a natural convection environment, compliant to JEDEC standards. The thermal performance of the package was evaluated for different die sizes and epoxy molding compounds at different power levels. The use of a heat slug was investigated to identify its effect on heat dissipation for the future generations of IC, which are expected to be smaller in size and to dissipate more power. Free convective flow velocities, detailed temperature and heat flow distributions around the package will also be presented.

The study demonstrates that applying CFD techniques can provide accurate results on estimating thermal characterization of an electronic package. Predicted device junction temperatures as well as the thermal resistance of packages can be predicted with a good accuracy for different ranges of power levels in natural convection. The numerically estimated die junction temperatures have also been found to be accurate and reliable.

The analysis is limited to an incompressible fluid. The effect of forced convection is not considered.

New and additional generated data will be helpful in the design and decision making time of the product to choose a low cost and viable thermal performance solution in the cooling of electronic components at low power.

The electronic package involves multi‐material and applying CFD technique is useful to determine the accurate thermal performance and simple and fast to apply for different conditions/material sets. Predictions of junction‐to‐ambient thermal resistance and device junction temperature values are compared against measurements. Excellent correlation was obtained. The results thus obtained compare well with the experimental results, but the computational effort and time required in the analysis is much small as compared.

This paper aims to compare and evaluate the influence of package designs and characteristics on the mechanical reliability of electronic assemblies when subjected to harmonic vibrations.

Using finite element analysis (FEA), the effect of package design-related parameters, including the interconnect array configuration, i.e. full vs perimeter, and package size, on solder mechanical stresses are fully addressed.

The results of FEA simulations revealed that the number of solder rows or columns available in the array, could significantly affect solder stresses. In addition, smaller packages result in lower solder stresses and differing distributions.

In literature, there are no papers that discuss the effect of solder array layout on electronic packages vibration reliability. In addition, general rules for designing electronic assemblies subjected to harmonic vibration loadings are proposed in this paper.

This paper focuses on the fluid-structure interaction (FSI) analysis of moisture induced stress for the flip chip ball grid array (FCBGA) package with hydrophobic and hydrophilic materials during the reflow soldering process. The purpose of this paper is to analyze the influence of moisture concentration and FCBGA with hydrophobic material on induced pressure and stress in the package at varies times.

The present study analyzed the warpage deformation during the reflow process via visual inspection machine (complied to Joint Electron Device Engineering Council standard) and FSI simulation by using ANSYS/FLUENT package. The direct concentration approach is used to model moisture diffusion and ANSYS is used to predict the Von-Misses stress. Models of Test Vehicle 1 (similar to Xie et al., 2009b) and Test Vehicle 2 (FCBGA package) with the combination of hydrophobic and hydrophilic materials are performed. The simulation for different moisture concentrations with reflows process time has been conducted.

The results from the mechanical reliability study indicate that the FSI analysis is found to be in good agreement with the published study and acceptable agreement with the experimental result. The maximum Von-Misses stress induced by the moisture significantly increased on FCBGA with hydrophobic material compared to FCBGA with a hydrophilic material. The presence of hydrophobic material that hinders the moisture desorption process. The analysis also illustrated the moisture could very possibly reside in electronic packaging and developed beyond saturated vapor into superheated vapor or compressed liquid, which exposed electronic packaging to higher stresses.

The findings provide valuable guidelines and references to engineers and packaging designers during the reflow soldering process in the microelectronics industry.

Studies on the influence of moisture concentration and hydrophobic material are still limited and studies on FCBGA package warpage under reflow process involving the effect of hydrophobic and hydrophilic materials are rarely reported. Thus, this study is important to effectively bridge the research gap and yield appropriate guidelines in the microelectronics industry.

The conventional design method relies on a priori knowledge, which limits the rapid and efficient development of electronic packaging structures. The purpose of this study is to propose a hybrid method of data-driven inverse design, which couples adaptive surrogate model technology with optimization algorithm to to enable an efficient and accurate inverse design of electronic packaging structures.

The multisurrogate accumulative local error-based ensemble forward prediction model is proposed to predict the performance properties of the packaging structure. As the forward prediction model is adaptive, it can identify respond to sensitive regions of design space and sample more design points in those regions, getting the trade-off between accuracy and computation resources. In addition, the forward prediction model uses the average ensemble method to mitigate the accuracy degradation caused by poor individual surrogate performance. The Particle Swarm Optimization algorithm is then coupled with the forward prediction model for the inverse design of the electronic packaging structure.

Benchmark testing demonstrated the superior approximate performance of the proposed ensemble model. Two engineering cases have shown that using the proposed method for inverse design has significant computational savings while ensuring design accuracy. In addition, the proposed method is capable of outputting multiple structure parameters according to the expected performance and can design the packaging structure based on its extreme performance.

Because of its data-driven nature, the inverse design method proposed also has potential applications in other scientific fields related to optimization and inverse design.

A review of state‐of‐the‐art technology pertinent to tape automated bonding (for fine pitch, high I/O, high performance, high yield, high volume and high reliability) is presented. Emphasis is placed on a new understanding of the key elements (for example, tapes, bumps, inner lead bonding, testing and burn‐in on tape‐with‐chip, encapsulation, outer lead bonding, thermal management, reliability and rework) of this rapidly moving technology.

High silicon Si–Al alloys (50–70 wt% Si) have been developed by Osprey Metals Ltd for use in electronic packaging. They have the advantages of a coefficient of thermal expansion that can be tailored to match ceramics and electronic materials (6–11 ppm/K), low density (<2.8 g/cm³) high thermal conductivity (>100 W/m K). These alloys are also environmentally friendly and are easy to recycle.These Osprey alloys can be fabricated readily into electronic packages by conventional machining with tungsten‐carbide or polycrystalline diamond (PCD) tools and electro‐discharge machining (EDM). Generally more than one of these conventional machining operations is required in the fabrication process. A new and much faster method has been developed which has been used to produce complete electronic packages from plates of Si–Al alloys in a single machining step. In this novel method, known as thin‐shell electroforming (TSE), an accurate model of the package is produced directly from the drawing in wax using a 3D Systems ThermoJet Modeller. This model is mounted into a frame and it is then plated with a thin copper electroform. The wax model is then melted leaving the electroform attached to the frame. This is backfilled with solder and used as the EDM tool for machining the package from a plate of Si–Al alloy.

The mismatch of the thermal expansion coefficients of the materials in multiplayer structure may induce serious stress concentrations in electronic packaging. Experimental evaluation of the thermal stresses and strains in those electronic composites is becoming significantly important for optimizing design and failure prediction of the electronic devices.

Digital image correlation (DIC) technique was utilized to obtain thermal deformation filed of a BGA package. With the help of white light to illuminate the cross section of the BGA package, the gray images were taken from the rough surface of the specimen, that offer a kid of carrier pattern for the DIC processing with statistical resemblance in gray distributions. By using the algorithm of correlation computation, the DIC searched the matching spots in a pair of those images in which the spot displacements were involved in between, to obtain the deformation fields of the package specimen caused by temperature changes.

The results show interesting strain distributions in the assembly. Both the horizontal displacement component and its normal derivative are strongly related to the arrangement of the solder joints in the bonding medium between the die and the ceramic substrate. The strain components in the middle region of the package are larger than those in the side regions where the strain relaxation may exist near the stress‐free boundaries. The shear strain components show special bands of parallel lines with identical amount over the chip‐package to sustain the shearing of the packed structure under thermal loading.

The DIC technique shows to be a useful tool for the thermal strain analysis of the electronic packaging devices. Not only provides it the whole field deformation of the assembly, but also maintains the surface pictures of the package without covering any fringes, which is important to compare the deformation field with the specimen surface to reveal the stain distribution related to the failure prediction of the materials.

The purpose of this paper is to develop a dynamic compact thermal model (DCTM) of electronic packages. This model is a necessary tool for rapid thermal analysis of the systems which we exposed to boundary condition variation and/or power switching mode such as mobile systems and battery powered systems.

The methodology of compact model generation used was based on generating the transient dynamic detailed finite element thermal model of a package, designing a resistor/capacitor network topology representative of the dynamic detailed model, calculating the resistors'/capacitors' value by optimization method and validation efforts. The method is demonstrated for a ball grid array (BGA) package, a commonly used modern electronic package.

Based on the obtained results, it can be concluded that the dynamic thermal behavior of a BGA package can be accurately described by a generated dynamic compact model in terms of predicted junction temperature response and heat flux of the desired locations of the package.

This model is capable of calculating the temperatures and heat fluxes at desired locations which can help the designer to perform the thermal analysis much faster and easier with the required accuracy.

As the solution to improve fatigue life and mechanical reliability of packaging structure, the material selection in PCB stack-up and partitioning design on PCB to eliminate the electromagnetic interference by keeping all circuit functions separate are suggested to be optimized from the mechanical stress point of view.

The present paper investigated the effect of RO4350B and RT5880 printed circuit board (PCB) laminates on fatigue life of the QFN (quad flat no-lead) packaging structure for high-frequency applications. During accelerated thermal cycling between −50 °C and 100 °C, the mismatched coefficients of thermal expansion (CTE) between packaging and PCB materials, initial PCB warping deformation and locally concentrated stress states significantly affected the fatigue life of the packaging structure. The intermetallics layer and mechanical strength of solder joints were examined to ensure the satisfactorily soldering quality prior to the thermal cycling process. The failure mechanism was investigated by the metallographic observations using a scanning electron microscope.

Typical fatigue behavior was revealed by grain coarsening due to cyclic stress, while at critical locations of packaging structures, the crack propagations were confirmed to be accompanied with coarsened grains by dye penetration tests. It is confirmed that the cyclic stress induced fatigue deformation is dominant in the deformation history of both PCB laminates. Due to the greater CTE differences in the RT5880 PCB laminate with those of the packaging materials, the thermally induced strains among different layered materials were more mismatched and led to the initiation and propagation of fatigue cracks in solder joints subjected to more severe stress states.

In addition to the electrical insulation and thermal dissipation, electronic packaging structures play a key role in mechanical connections between IC chips and PCB.