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Article
Publication date: 7 August 2017

Zbigniew Magonski and Barbara Dziurdzia

The aim of this paper is to find the electrical representation of a solid oxide fuel cell (SOFC) that enables the application of typical exploitation characteristics of…

Abstract

Purpose

The aim of this paper is to find the electrical representation of a solid oxide fuel cell (SOFC) that enables the application of typical exploitation characteristics of fuel cells for estimation of fuel cell parameters (for example, exchange current) and easy analysis of phenomena occurred during the fuel cell operation.

Design/methodology/approach

Three-layer structure of an SOFC, where a thin semi-conducting layer of electrolyte separates the anode from the cathode, shows a strong similarity to typical semiconductor devices built on the basis of P-N junctions, like diodes or transistors. Current–voltage (I-V) characteristics of a fuel cell can be described by the same mathematical functions as I-V plots of semiconductor devices. On the basis of this similarity and analysis of impedance spectra of a real fuel cell, two electrical representations of the SOFC have been created.

Findings

The simplified electrical representation of SOFC consists of a voltage source connected in series with a diode, which symbolizes a voltage drop on a cell cathode, and two resistors. This model is based on the similarity of Butler-Volmer to Shockley equation. The advanced representation comprises a voltage source connected in series with a bipolar transistor in close to saturation mode and two resistors. The base-emitter junction of the transistor represents voltage drop on the cell cathode, and the base-collector junction represents voltage drop on the cell anode. This model is based on the similarity of Butler-Volmer equation to Ebers-Moll equation.

Originality/value

The proposed approach based on the Shockley and Ebers-Moll formulas enables the more accurate estimation of the ion exchange current and other fuel cell parameters than the approach based on the Butler-Volmer and Tafel formulas. The usability of semiconductor models for analysis of SOFC operation was proved. The models were successively applied in a new design of a planar ceramic fuel cell, which features by reduced thermal capacity, short start-up time and limited number of metal components and which has become the basis for the SOFC stack design.

Details

Microelectronics International, vol. 34 no. 3
Type: Research Article
ISSN: 1356-5362

Keywords

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Article
Publication date: 1 June 2005

Michał Tadeusiewicz and Stanisław Hałgas

Developing an efficient second‐order integration method of transient analysis of nonlinear dynamic circuits which overcomes the main drawback of the trapezoidal rule.

Abstract

Purpose

Developing an efficient second‐order integration method of transient analysis of nonlinear dynamic circuits which overcomes the main drawback of the trapezoidal rule.

Design/methodology/approach

Dynamic circuits including transistors and operational amplifiers are considered. A new family of two‐step, second‐order numerical integration algorithms has been developed using a polynomial approximation.

Findings

The algorithms have been worked out which are implicit, A‐stable and they depend on a parameter which is allowed to be changed during the computation process according to a proposed strategy. Also the variable step‐size formula has been derived enabling us to eliminate a restarting procedure. The method has been implemented and tested using several representative circuits. It has been compared, both theoretically and via numerical examples, with the alternative well known algorithms: the trapezoidal rule and the backward differentiation formula of order two.

Research limitation/implications

The algorithms developed in the paper are two‐step and second‐order, consequently the step size cannot be too large and the algorithms are not L‐stable.

Originality/value

A new family of two‐step implicit integration algorithms is developed. It can be useful for the analysis and design of electronic circuits.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 24 no. 2
Type: Research Article
ISSN: 0332-1649

Keywords

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Article
Publication date: 12 July 2011

Michał Tadeusiewicz and Stanisław Hałgas

The purpose of this paper is to develop a method for finding all the DC solutions in nonlinear circuits with the thermal constraint.

Abstract

Purpose

The purpose of this paper is to develop a method for finding all the DC solutions in nonlinear circuits with the thermal constraint.

Design/methodology/approach

The proposed approach employs an algorithm for finding all the DC solutions without thermal constraint, including a new contraction and elimination method, an efficient method for tracing characteristics expressing voltages and power in terms of temperature, and electrical analog of the chip thermal behavior.

Findings

The paper brings a method that guarantees finding all the DC solutions, considering thermal behavior of the chip, in mid‐scale practical transistor circuits.

Originality/value

A new contraction and elimination method, being the core of the algorithm for finding all the DC solutions, is proposed. An approach enabling us to consider a feedback between the power dissipated inside the chip and the temperature, which affects the circuit parameters and consequently the solutions is developed.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 30 no. 4
Type: Research Article
ISSN: 0332-1649

Keywords

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Article
Publication date: 2 January 2018

Alexander Zemliak

This paper aims to propose a new approach on the problem of circuit optimisation by using the generalised optimisation methodology presented earlier. This approach is…

Abstract

Purpose

This paper aims to propose a new approach on the problem of circuit optimisation by using the generalised optimisation methodology presented earlier. This approach is focused on the application of the maximum principle of Pontryagin for searching the best structure of a control vector providing the minimum central processing unit (CPU) time.

Design/methodology/approach

The process of circuit optimisation is defined mathematically as a controllable dynamical system with a control vector that changes the internal structure of the equations of the optimisation procedure. In this case, a well-known maximum principle of Pontryagin is the best theoretical approach for finding of the optimum structure of control vector. A practical approach for the realisation of the maximum principle is based on the analysis of the behaviour of a Hamiltonian for various strategies of optimisation and provides the possibility to find the optimum points of switching for the control vector.

Findings

It is shown that in spite of the fact that the maximum principle is not a sufficient condition for obtaining the global minimum for the non-linear problem, the decision can be obtained in the form of local minima. These local minima provide rather a low value of the CPU time. Numerical results were obtained for both a two-dimensional case and an N-dimensional case.

Originality/value

The possibility of the use of the maximum principle of Pontryagin to a problem of circuit optimisation is analysed systematically for the first time. The important result is the theoretical justification of formerly discovered effect of acceleration of the process of circuit optimisation.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 37 no. 1
Type: Research Article
ISSN: 0332-1649

Keywords

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Article
Publication date: 1 April 1993

O.A. Palusinski and M. Abdennadher

The transient simulation of integrated circuit has become very expensive in terms of computer time due to increase in the number of transistors in typical simulation…

Abstract

The transient simulation of integrated circuit has become very expensive in terms of computer time due to increase in the number of transistors in typical simulation. Spectral technique and Chebyshev polynomials offers an efficient alternative algorithm for simulation of integrated circuits. In this paper an automatic formulation of circuit elements and transistor models, built in MOS technology, for analysis using spectral technique is presented. The algorithm is implemented and the simulation is proven to require less computer time than in the case of SPICE or ASTAP

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 12 no. 4
Type: Research Article
ISSN: 0332-1649

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Article
Publication date: 1 December 2001

J. Cel

By a polyhedral or piecewise‐linear configuration in Rn we mean the finite union of finite intersections of open or closed halfspaces. It is proved that every such…

Abstract

By a polyhedral or piecewise‐linear configuration in Rn we mean the finite union of finite intersections of open or closed halfspaces. It is proved that every such configuration can be characterized by the single algebraic‐like equation involving only addition, subtraction, multiplication, absolute value and signum operators. Next, all such simplest implicit characterizations are found for idealized diodes, the ideal step function and the hysteresis function. Finally, the one‐dimensional infinite potential trough is analysed and the obtained equations are conjectured to be the simplest possible. All this allows among others to describe systems containing piecewise‐linear elements in a compact form suitable for further analytic studies.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 20 no. 4
Type: Research Article
ISSN: 0332-1649

Keywords

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Article
Publication date: 3 May 2013

Miguel Ángel San Pablo Juárez, Alexander Zemliak and Eduardo Ríos Silva

This work seeks to present the theoretical study considerations and the characteristics of a general design methodology in optimal time for electronic systems using…

Abstract

Purpose

This work seeks to present the theoretical study considerations and the characteristics of a general design methodology in optimal time for electronic systems using numerical methods and optimal control theory. Through this, the design problem of a system is formulated in terms of optimal control in minimal time.

Design/methodology/approach

This general design methodology includes the traditional design strategy (TDS), and the modified traditional design strategy (MTDS), where the model of the system is part of the optimization procedure but an objective function of the optimization process is constructed such as includes the traditional objective function and some penalty functions that feign the model of the system. Many special control functions are introduced artificially to generalize the methodology and produce several design trajectories for the same optimization process – the first and final trajectories correspond to TDS and MTDS, respectively. The combination of these trajectories produce an infinite number of design strategies, some of these are quasi‐optimal in time and only one is optimal in time.

Findings

Qualitative and numeric results of this iterative process are generated in a personal computer in a C++ language elaborated with a visual C++ graphic user interface. An algorithm is constructed to form an optimal in time design strategy switching from a MTDS subset to a TDS subset. Results of measured times are analyzed, showing that there is a control input U, such that the objective function is minimized in a minimum time.

Originality/value

These ideas are proposed using method of gradient optimization and special acceleration effect.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 32 no. 3
Type: Research Article
ISSN: 0332-1649

Keywords

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