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Diffusion patterning is a dielectric patterning technology, which is used in the screen printed thick film technology for higher density multilayer circuits. This technology is suitable for producing lower cost multichip modules and requires a low additional investment in conventional thick film technology production lines. Comparisons of via resolution capability of diffusion patterning versus conventional thick film technology are described and discussed. Preliminary experimental results obtained with a test circuit showed that 200μm lines and 200μm vias could be achieved with acceptable yield and with minimal modification to standard production lines. The electronic circuit for the pressure sensor was designed and realised with the verified technology as a low‐cost ceramic multichip module. A few results of an investigation of some thick film materials, which comprise the “set” of pastes for diffusion patterning technology, are presented.

The paper presents a comparative analysis of the properties of ruthenate resistor layers produced on alumina substrates and on dielectric layers previously deposited on them. The effect of dielectric type and the peak firing temperature of ruthenate layers upon the value of their resistance and TCR (temperature coefficient of resistance) has been investigated. The reproducibility and stability of these parameters have been evaluated.

The solderability of a material is considered as the ability of the surface to be wetted by solder, and the rate at which this process occurs. The solderability of thick film conductors based on palladium—silver, by Pb/Sn/Ag solder, was evaluated using a meniscograph. The influence of the composition of the conductor and that of the temperature of the solderbath on the solderability were measured. The usefulness of meniscographic data for the production line is indicated by showing the relation between the production data, reported as the rate at which a full automated solder machine is operated, and the meniscographic results.

In this paper, it is shown that the so‐called in‐situ electrical measurement technique is a valuable tool for understanding failure mechanisms in thick film dielectrics. The technique makes it possible to measure important electrical characteristics of thick film dielectric systems in the temperature range from room temperature up to 900°C. This information is essential to understand failure mechanisms and to optimise the system with respect to quality and reliability. Mainly two electrical properties have been investigated: (i) the electrical resistance of the dielectric as a function of temperature and (ii) the spontaneous electromotive force occurring at higher temperatures between two metal layers with the dielectric in between. A significant result of the work is the observation of a close correlation between the leakage current measured through the dielectric at elevated temperatures, and the ability of the dielectric to resist shorting and blistering effects during the preparation of circuits. Secondly, from in‐situ voltage measurements, it was confirmed that the mixed metallurgy system Au(bottom)‐dielectric‐Ag(top) acts at 850°C as a spontaneous battery, and the battery voltage (i.e., the spontaneous electromotive force) was measured. Depending on the type of dielectric, a battery voltage up to 200 mV between the two metal layers was observed. As a result of this spontaneous electromotive force, blistering occurs. The battery voltage was shown to be much smaller in unmixed metallurgy systems with Ag(bottom)‐dielectric‐Ag(top) or Au(bottom)‐dielectric‐Au(top). However, if an external voltage of 300 mV is applied to such a system during a temperature profile up to 850°C, blisters can also be induced. This shows unambiguously that blistering is a voltage driven effect.

The increasing use of high switching speed systems in both microwave electronics and high speed logic devices has created the need for printed circuit boards which are based on low dielectric constant and low loss materials. In addition, these circuit materials must be capable of withstanding elevated temperatures typical of hostile service environments and of board fabrication processes. Such low dielectric constant rigid boards are commercially available from a few sources. However, there is a growing demand for low dielectric constant flexible printed circuit boards for interconnecting rigid boards or in rigid/flex applications where high speed, fast rise times, controlled impedance and low crosstalk are important. A new family of thin laminates which are suitable for fabrication of flexible low dielectric constant printed circuit boards have been developed by Rogers Corporation. These circuit materials are called ROhyphen;2500 laminates and offer flexible interconnections in high speed electronic systems. RO‐2500 circuit materials are based on microglass reinforced fluorocarbon composites and have a typical dielectric constant of 25. The transmission line properties of these materials have been evaluated by the IPC‐FC‐201 test method. The results indicated that these circuit materials improve the propagation velocity by about 10% and the rise time by about 30% when compared with the same geometry, polyimide film based, flexible PCs in stripline constructions. Also, dimensional stability of these laminates after etch and heat ageing is improved over that of the standard flex circuit materials based on polyimide film. RO‐2500 laminate properties have been evaluated by the IPC‐TM‐650 test methods, which are widely accepted by the flexible PCB industry.

The dyadic Green's function for a horizontally stratified dielectric medium is computed. The general electric field integral equation describing the scattering from an arbitrary dielectric scatterer embedded in one of the layers is formulated using the dyadic Green's function of the respective layer. For the numerical solution of the equation the method of moments is used. Numerical results are given for the case of a cylinder buried in the middle of a five‐layer space for various cases of plane wave excitation.

The purpose of this paper is to analyze the individual steps during the printing of capacitor structures. The method of substrate preparation, the obtained roughness of conductive and dielectric layers are examined. Moreover, the capacitances of the obtained capacitors were examined.

Surface roughness and microscopic analysis were used to assess the quality of printed conductive structures. Two criteria were used to assess the quality of printed dielectric structures: the necessary lack of discontinuity of layers and minimal roughness. To determine the importance of printing parameters, a draft experimental method was proposed.

The optimal way to clean the substrate has been determined. The most important parameters for the dielectric layer (i.e. drop-space, table temperature, curing time and temperature) were found.

If dielectric layers are printed correctly, most problems with printing complex electronic structures (transistors, capacitors) will be eliminated.

The tests performed identified the most important factors for dielectric layers. Using them, capacitors of repeatable capacity were printed.

In the literature on this subject, no factors were found which were responsible for obtaining homogeneous dielectric layers.

The purpose of this paper is to present a comprehensive review on development and future trends in zinc oxide thin film transistors (ZnO TFTs). This paper presents the development of TFT technology starting from amorphous silicon, poly-Si to ZnO TFTs. This paper also discusses about transport and device modeling of ZnO TFT and provides a comparative analysis with other TFTs on the basis of performance parameters.

It highlights the need of high–k dielectrics for low leakage and low threshold voltage in ZnO TFTs. This paper also explains the effect of grain boundaries, trap densities and threshold voltage shift on the performance of ZnO TFT. Moreover, it also addresses the challenges like requirement of stable p-type ZnO semiconductor for various electronic applications and high value of ZnO mobility to meet growing demand of high-definition light emitting diode TV (HD-LED TV).

This review will motivate the readers to further investigate the conduction mechanism, best alternate for gate-dielectric and the deposition technique optimization for the enhancement of the performance of ZnO TFTs.

This is a literature review. The technological evolution of TFT in general and ZnO TFT in particular is presented in this paper.

The trend in wireless and mobile communications for broader bandwidth microwave circuitry, coupled with high packaging density and low cost fabrication has triggered investigations of new circuit configurations and technologies that meet these requirements. We have addressed these issues through the study of multilayer microwave structures using advanced thick‐film technology. The techniques described employ several layers of metal sandwiched by thick‐film dielectric. This leads to an efficient solution for system miniaturisation. The significance of this work is that it shows the multilayer approach to microwave structures, coupled with new thick‐film technology, offers a viable and economic solution to achieve high‐density, high‐performance microwave circuits.

The study of instability due to the effects of Maxwell–Cattaneo law and internal heat source/sink on Casson dielectric fluid horizontal layer is an open question. Therefore, in this paper, the impact of internal heat generation/absorption on Rayleigh–Bénard convection in a non-Newtonian dielectric fluid with Maxwell–Cattaneo heat flux is investigated. The horizontal layer of the fluid is cooled from the upper boundary, while an isothermal boundary condition is utilized at the lower boundary.

The Casson fluid model is utilized to characterize the non-Newtonian fluid behavior. The horizontal layer of the fluid is cooled from the upper boundary, while an isothermal boundary condition is utilized at the lower boundary. The governing equations are non-dimensionalized using appropriate dimensionless variables and the subsequent equations are solved for the critical Rayleigh number using the normal mode technique (NMT).

Results are presented for two different cases namely dielectric Newtonian fluid (DNF) and dielectric non-Newtonian Casson fluid (DNCF). The effects of Cattaneo number, Casson fluid parameter, heat source/sink parameter on critical Rayleigh number and wavenumber are analyzed in detail. It is found that the value Rayleigh number for non-Newtonian fluid is higher than that of Newtonian fluid; also the heat source aspect decreases the magnitude of the Rayleigh number.

The effect of Maxwell–Cattaneo heat flux and internal heat source/sink on Rayleigh-Bénard convection in Casson dielectric fluid is investigated for the first time.